hexdecimal decoder

Discussion in 'Homework Help' started by kuxz2008, Jun 30, 2010.

  1. kuxz2008

    Thread Starter Member

    Nov 16, 2009
    i have a project that require me to design a hexadecimal to 7 segment decoder for common cathode using only BASIC GATES (AND, OR, NOT GATES).

    after i have drawn the truth tables and k map, the below shows the equation for outputs a-g. ( [ ] - BAR )

    a= [D]B + CB + D[A] + [CA] +[D]CA +D[CB]

    b= [CB] + [CA] + [DBA] + [D]BA + DA

    c= [D]C +D[C] +A + [DB] + [D]A

    d= D + [DC]B + [DCA] + DC[A] + D[C]A + [D]B[A] + CA

    e= DC + B[A] + DB + D[A] + [CA]

    f= D[C] + [BA] + C[A] + DB + [D]C

    g= D[C] + B[A] + DA + [C]B + [D]C

    I would like to know those highlighted in red colour, can it be simplifiy further ?
    And is all the equations above the most simplify ?
  2. Georacer


    Nov 25, 2009
    It usually takes a lot of effort to further simplify a boolean expression for a single output. But given the fact that you will make 7 expressions, you can merge some parts together. For example, for leds f and g you have 2 common factors. This kind of thinking is quite hardware-reducing in my opinion.
    As for combinations like AB'+B'A, those can be substituted by a 2-input XOR gate. Another example is D'BA+DB'A wich could be writter as (D\oplusB)\cdotA. Work your way with boolean logic to find how you can best incorporate XOR gates in your circuit.