Hi. I wouldn't mind some eyes on this in case I'm missing something. See attached.
The idea is that two logic IC's (a demux and a inverter gate) are deciding how signals are routed depending on whether or not USB or battery power, or both, is present. The issue is that the logic IC's themselves need power. So in this diagram, Vaa is the battery and it can range from 7.0 to 12.6 Volts. Vbb is a steady 5V from USB. I use a 4.7V zener to regulate the battery down and use a common cathode rectifier to isolate the two sources. The rectifier has a voltage drop as low as 200mV at very low current so I figure 4.7V takes me down to 4.5V, which is the minimum that the demux can work with* (the gate can go much lower) and also ensures the 5.5V max is respected. 4.7V should also be low enough that the 7V minimum battery voltage is far enough away for the Zener to do its job (right?). Considering this is only powering these two logic chips, I believe... if I'm understanding the datasheets correctly, they'll draw a max of only 13uA. But its the math that I wouldn't mind more eyes on.
Or am I way off because the chips' datasheets both have a ΔIcc figure that I'm not really understanding.
This is eventually (hopefully) for production so component cost is important. I realize I can use a vReg rather than the zener if I have to.
Anyway, hope its clear. Thanks.
- Steven
* Actually the demux datasheet by TI says 4.0V, but availability may be an issue and NXP's replacement says 4.5V so I want to stick with that.
Links to datasheets:
SN74CBT3257BQ
74LVC1G04GV
BAT754C,215/BKN
MMBZ5230B-7-F
The idea is that two logic IC's (a demux and a inverter gate) are deciding how signals are routed depending on whether or not USB or battery power, or both, is present. The issue is that the logic IC's themselves need power. So in this diagram, Vaa is the battery and it can range from 7.0 to 12.6 Volts. Vbb is a steady 5V from USB. I use a 4.7V zener to regulate the battery down and use a common cathode rectifier to isolate the two sources. The rectifier has a voltage drop as low as 200mV at very low current so I figure 4.7V takes me down to 4.5V, which is the minimum that the demux can work with* (the gate can go much lower) and also ensures the 5.5V max is respected. 4.7V should also be low enough that the 7V minimum battery voltage is far enough away for the Zener to do its job (right?). Considering this is only powering these two logic chips, I believe... if I'm understanding the datasheets correctly, they'll draw a max of only 13uA. But its the math that I wouldn't mind more eyes on.
Or am I way off because the chips' datasheets both have a ΔIcc figure that I'm not really understanding.
This is eventually (hopefully) for production so component cost is important. I realize I can use a vReg rather than the zener if I have to.
Anyway, hope its clear. Thanks.
- Steven
* Actually the demux datasheet by TI says 4.0V, but availability may be an issue and NXP's replacement says 4.5V so I want to stick with that.
Links to datasheets:
SN74CBT3257BQ
74LVC1G04GV
BAT754C,215/BKN
MMBZ5230B-7-F
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