I am very novice person here, I need some help to read this schematics .
In the above figure I see that ICS872S06 , has CLK_EN ( pin 51 ) input this needs to be driven low in order to enable the chip.
PLD6_OUT_PROC_CRC_CLK_EN_N can be driven via a GPIO that I need to code.
What I am not understanding from schematic is the role of +3.3VCS which connects to this signal.
Can someone help?