help with pre amp design

Discussion in 'Homework Help' started by aruna1, Dec 17, 2009.

  1. aruna1

    Thread Starter Active Member

    Dec 20, 2008
    I have to design a multistage bjt pre amplifier with following conditions
    gain 20-60dB
    input impedence >= 5K ohm
    output impedence <= 100 ohm
    bandwidth 300Hz - 3MHz
    source impedence 600 ohm
    load impedence 10 K ohm

    i dont know how to calculate capacitor values to match above bandwidth

    can someone please give me a good tutorial link which i can learn to design above pre amplifier?

  2. lmartinez

    Active Member

    Mar 8, 2009
  3. aruna1

    Thread Starter Active Member

    Dec 20, 2008
    came up with this
  4. Jony130

    AAC Fanatic!

    Feb 17, 2009
    Hmm, we could pick C2,C3,C4 for F=30Hz.
    And then C1 for 300Hz
    For example
    C4=0.16/(30Hz*10K)=533nF but we decide to use C4=1uF
    Then remove C5 and calculate Fg from small signal model.

    F=\frac{1 }{2*\Pi*Cin*Rs||Rin1}

    Cin=C_{be}*\frac{r_e }{r_e+(Hfe+1)*Re1}+C_{bc}*(1-Ku)

    Ku - Voltage gain



    C_{be}=\frac{gm }{2*\Pi*Ft}-C_{bc}

    After that calculation we must add capacitor parallel to Cbc to achieve Fg=3MHz.
  5. aruna1

    Thread Starter Active Member

    Dec 20, 2008
    thanks :) :)
  6. PRS

    Well-Known Member

    Aug 24, 2008
    This looks like a typical EE student design project. I did one very much like it. I take it you know how to get the midband gain, but you are wondering how to get the 300 Hz to 3 MHz bandwidth.

    The lower roll on frequency of 300 Hz is determined by your coupling capacitors and the bypass capacitors of your common emitter stages. Create a dominant pole with a coupling capacitor, and you'll get your lower roll on frequency. Remember that its impedance goes up as the frequency goes down, thereby blocking more current as the frequencygoes down. A good choice is the input capacitor of the first stage. Calculate C as 1/(2*pi*R*F) where F is 300 Hz and R is the resistance seen by that capacitor. Rs + Rb//Rin

    To get the upper roll off frequency you need to consider that it is the internal capacitance s of your transistors that determine the highest frequency your circuit is capable of. Design the overall circuit with small valued resistors and small gains per stage and use high hfe (ft) transistors. Doing this you need to exceed the output specification of 3 MHz. Once this is done, if you want to limit the bandwidth to 3 MHz you need to limit the high frequency roll off point. You can do this with a capacitor in parallel with RL, the load. It's impedance goes down as the frequency goes up. So choose a capacitor such that C = 1/(2*pi*R*F) Where F is 3 MHz and R is your load resistor in parallel with the output resistance of the last stage.
    Last edited: Dec 22, 2009