I've attached a scan of a problem I'm working on. I need to change this circuit to all NAND gates. I have no clue if what I've done so far is correct. It seems like to go to NAND you have to get rid of the +'s. Is this even close to correct the way that I've done it? Once I have converted this to a NAND circuit then I need to draw it. I would greatly appreciate any advice. Thanks
You can implement DeMorgan's Law by changing the type of gate (OR to AND or vice versa) and inverting all of the inputs and outputs. You can then move the inversion dots along their respective signals to simplify.
In problem (b), notice the bottom AND gate. In a theoretical model (that is, without propagation delays being considered), it is impossible to get a true output, since one of the inputs will always be false. That leaves the output of the OR gate being A\B+A\CD, since DBD\ is always false. In the real world, if B were high, and D were transitioned from low to high, the output would go true for a period of time equal to the propagation delay of the inverter.
These problems are always best approached algebraically (particularly if the function is relatively simple). Firstly write out the function, which you have done. There are two things you need to look at here: the first one is to use the double-NOT - this is a boolean algebra construct that does not change the function, i.e. 1 -> NOT -> 0 -> NOT -> 1 - a pair of cascaded NOT gates does not change the function. The second thing you need to consider is, as veritas suggested, using DeMorgans theorems: http://www.allaboutcircuits.com/vol_4/chpt_7/8.html As you say, you need to get the function without OR operators (the + sign), and DeMorgans can help you transfer from AND operators to OR operators and vice versa. Furthermore, do not be concerned about NOT functions because they too can be implemented using NAND gates by using a 2-input gate and tying the inputs together. Does that make things a little clearer? Dave
When you DeMorgan something can you just add a line if you want to? I read the article on hear about DeMorgans and was wandering if there are any rules apply to adding one or two lines. Thanks Dennis
If you're referring to using a 3-input gate instead of a 2-input gate, the answer is yes. The number of inputs does not affect the process I described.
Yes that would be NOT ______ all the way across. Not sure how to post it online. So if I got A'+A'B+AC would I DeMorgan that or A'AC? Thanks Dennis
Ok, when you do not get a NOT across all variables, then you use the double-NOT function I described previously to create one. Lets look at how it works on your example: 1. Take you expression: A'+A'B+AC and double-NOT the function (remember double-NOT does not change the expression, see my first post in this thread for a reason why). The expression is now (A'+A'B+AC)'' 2. Now apply DeMorgans: (A + B)' = A'B' (Remember this can be extrapoltaed to any number of inputs, i.e. (A + B + C)' = A'B'C' 3. For simplicity, make the following substitutions from the general DeMorgans equation in part 2: A = A' B = A'B C = AC' (We will substitute these back in later) 4. Apply DeMorgans (remember the other NOT): ((A + B + C)')' = (A'B'C')' 5. Substutute back in variables from part 3: (A'B'C')' = ((A')'(A'B)'(AC')')' 6. Simplify: (A')' = A Therefore: (A(A'B)'(AC')')' This expression can be implemented using solely NAND gates, where a NOT gate is created from a NAND gate with the two inputs tied together. I recommend you write it out onto paper and familiarise yourself with it works. Ask further questions if you have a problem. Dave
Thanks alot Dave for that very helpful response. I attached a scan of where I am at. I guess the problem is I just don't know when to stop DeMorganizng.......lol. Do you stop breaking the line and changing the signs from + to * as soon as you get all the +'s gone (since I'm going to NAND) or do continue to break the lines as long as there is a line to break? It looks like I could break the line above say (A'C'), but that would give me (A+C) which I think I don't want a + in the circuit. The answer I came up with was A'+A'B+A'C, should I reduce that down to A'+A'C before I draw up the diagrahm? Thanks again for the help! Dennis
The expression as is completely simplified and can be implemented solely using NAND gates, so you don't need to go any further. If you were to continue DeMorganizing (as you say!) you will notice something interesting: (A(A'B)'(AC')')' Apply DeMorgans (ABC)' = (A' + B' + C') (A(A'B)'(AC)')' = ((A)' + (A'B)'' + (AC)'') Which simplifies to: A' + A'B + AC This is your original expression, which confirms that the Double-NOT function does not alter the expression and that DeMorgans does in fact work! There are instances where you may want to continue DeMorganizing. Consider part of you above expression in AND-form: (A(AC)')' There are two As that can possibly be removed. So try DeMorgans again on (AC)': (AC)' = (A' + C') You expression becomes: (A(A' + C'))' Multiply out and you get: (AA' + AC')' And AA' = 0, so: (A(AC)')' = (AC')' But you will only be able to recognise these further simplifications by practice. Be aware of the Boolean Algebraic Identities and Properties which will give you some tricks to simplifying expressions. Now you have the answer for part (a), have a go at part (b). Dave
Thanks again for the help! I will be so glad when this class if over! I have been a technician for 14 yrs. now and found out I had to go back to school to keep my job. I'm a pro at hydraulics, pneumatics, and the mechanical side. I guess 14 yrs. of experience doesn't amount to a associates degree. I just don't get this logic stuff, I had no problems with PLC and have received an A in every class so far. My hats off to you guys that do this everyday! My mind just doesn't work this way.......lol. I have already put in hour and hours just trying to figure these problems out. It seems like I'm always picking things up (understanding) about a week or two late. Dennis
No problems. If we can help we will. You have part (a) in the bag - your attached answer previously is correct, all you will need to do is draw the schematic, so let us know if you want help with that. Now when you look at part (b) you should reference what I said in your other thread: http://forum.allaboutcircuits.com/showthread.php?t=10646 - your expression is correct from the diagram, but you need to firstly simplify taking account of the superfluous gate I describe in that thread. The steps thereafter are pretty much the same as part (a). Dave
I plotted out this does it look right? Probably not but this is my first one.........lol. Thanks Dennis
Two points: 1) A NAND gate by definition must have at least two input. 2) You cannot use a NOT gate - a NOT gate is created by taking a two input NAND-gate and tying the inputs together. I have attached the circuit (apologies for the dodgy drawing - done on a Tablet PC!!) Dave
Please note I have written the output of gate 4 wrong in the above diagram, it should of course read (A(A'B)'(AC')')' and not (A(A'B)(AC'))'. The circuit layout is correct. Dave
Thanks alot again! I attached a scan of problem 2. Hopefully its right, but probably not. Would somebody please look at this and let me know what I need to work on. Here is the problem rewritten with all NAND gates. Thanks again, Dennis
I attached again the same two circuits, I tried to DeMorgan them so I could write them with NOR gates only. Do these two circuits look like they're ready to draw or are there errors in them. Thanks Dennis
Lets start with the DBD' AND-gate. Boolean algebra follows the same rules as standard algebra. Consider: aba = 2ab i.e. the two "a" multiply independant of "b" So think about DBD': DD' = 0 So we have: 0 AND B which is 0 no matter what B is. Therefore: DBD' = 0 - Always So: ((A'B) + (A'CD) + (DBD'))' = ((A'B) + (A'CD) + 0)' = ((A'B) + (A'CD))' Clear? Ok, so now apply DeMorgans: (A + B)' = A'B' Where: A = (A'B) B = (A'CD) It is a one step process. From there you can create your circuit (remember a NAND-gate with the inputs tied together is a NOT-gate - you will need 4 of these in the final circuit). Dave
Did the first two NAND circuits end up right? Hopefully the errors you were pointing out was in my last post to change them to NOR gates. Thanks Dennis