Hello everyone!,

First time posting here, so I don't know what to expect. I'm currently trying to design a very precise current loop through a solenoid. I have found a fully integrated H-bridge that I am happy with, but I am having some trouble with measuring current.

I want to use low-side current measurement through a 0.08 Ohm resistor. Apparently when the H-bridge switches states, there will be a voltage spike present across the sense resistor. This is not due to the expected current flow, but more due to the intrinsic capacitance of the FETs. Regardless of the reasoning, I am not sure what to expect. I am using a very nice precision low-offset / offset drift opamp that cannot tolerate more than 5.3V or less than 0.3V at its input.

The maximum RMS current that I plan to measure is 4A, yielding 320mV across the resistor. I cannot measure these spikes, so I wanted to plan for the worst. Is there a way to block these from causing potential damage?

In the past, I have seen capacitors placed across the resistor to cut off the spike, but I don't want to effect the dynamic response of my controller by introduction of an unnecessary pole. I tried to find analog switches that I could actively turn off and on with my controller, but all fault-tolerant switches are out of my supply range. I have heard of the classic series resistor and two schottky diodes to both VCC and GND, but I think that may effect my offset stability over temperature.

I was thinking of using a transistor as a switch to pull down a small resistance in series with the sense resistor output. I'm really worried about any unnecessary noise issues and was hoping for an elegant solution. Can anyone offer advice?

My application is really critical and I have spared no expense in its implementation. The project is basically a sensorless active magnetic bearing controller, as part of my degree requirements.

Thanks a lot !

Stephen

 

Thought yourself into a corner, eh?

BT,DT.

Consider using a dual comparator IC to sample the input voltage; one side trips if the voltage is too high, the other trips if the voltage is too low. Your sensitive op amp is connected to the sense resistor via a 10k resistor, the inputs to the comparators is directly from the sense resistor.

If either comparator trips, you have the outputs wired to pull your sensitive IC to a known safe voltage level in the middle of the 0.3-5.3 range.

Your opamp will have some input capacitance; the 10k resistor will slow the response by a small amount; the idea being the comparators will have time to sample the voltage and clamp it if it's excessive.

Instead, you might consider using an analog switch, such as a MAX333. It has a typical ON-state resistance of about 17 Ohms. When you know you're going to actuate the solenoid, first trip the analog switch to ground the input to your op amp, actuate the solenoid, wait for the spike to pass (sample it with comparators or a more robust op amp), then reset the switch.

Another idea would be to use the comparator scheme to automatically kick in a voltage divider network, say 10:1 or 50:1. Comparators generally put out TTL or CMOS compatible signals anyway - might as well use them.

Switching time and prop delays may be a problem - I don't know what your spike rise time or peak voltage will be either; you haven't given enough data for that.

 

SgtWookie,

You're 100% correct about the thinking myself into a corner thing, in my defense, I believe the devil is in the detail. Especially considering that I am directly implementing on a PCB without breadboarding, which has worked great in the past. Knock on wood!

The current sense signal will be applied to a non-inverting amplifier to bring it up to my 16-bit ADC's reference voltage of 4.096V. As you can imagine, noise considerations are extremely important. Furthermore, since I am measuring DC, input offset stability is also extremely important. The ADC's theoretical resolution is roughly 4.9uV. Even my precision opamp is going to introduce about 0.5Vp-p voltage noise at the input. Noise is very important

I was considering using analog switches, but I simply do not have the supply voltage for it. I have a really noisy 42V supply, but I would have to shy away from getting that even remotely close to this circuit. The rest of my voltages are: 5V@2A, 3.3V@6A, 2.5V@1.2A, 1.8V@500mA, 1.2V@6A. As you can see, I have too many already

As for the propogation delay, etc.. I'm at a loss, all that I have read is that it is a very short pulse following the change in state of the bridge. It definitely can be accounted for, since I am running the PWM from a FPGA that can produce a pretty versatile blanking pulse.

I am a bit concerned about using comparators, just for the potential for voltage noise. I would prefer to have a FPGA generated blanking signal. I wish they made these analog switches with a 5V supply rail, since I am only down to like 0.5V maximum input.

I will let you know if I can dig anything else up, but for now, I'm setting it aside for other, less ambiguous, issues. Nonetheless, I still need to have a solution by next week..

Thanks for your response!

Steve

 

What op amp are you using?

Have you looked at Linear Technology's offerrings? Have a look-see at LT1007 and it's twin sibling, the LT1057. Around 2nanovolts of noise. There's a quad LT1058, but the more in a package, the lower the specs - and you can wind up with lockup or phase reversal in the LT1058 under certain conditions.

Something else you might consider is using a 24 bit ADC instead of using an op amp to boost the signal; that way you could just read it directly. ADCs generally have a capacitive input, so your out-of-range transients aren't as much of a concern.

 

Would a 'FET input' difference amplifier or instrumentation amplifier with a high common mode voltage tolerance be an option?

 

SgtWookie,

I am using the AD8628 from Analog Devices. That's a nice looking opamp, but its offset voltage is about ten fold higher than mine, along with 300X the drift. The 22nV/sqrt(Hz) isn't that bad in my application, since the noise floor should be low enough for full 16-bit resolution. These amplifiers use different techniques for the low-offset and drift, such as 'chopper stabilization'. Apparently, Analog has come up with a way to stabilize the amplifier without introducing digital noise from the chopping via some sort of comprimise or combination of methods. This is what had attracted me to the solution.

Good idea for the directly coupled ADC, and if you had known my sampling rate, you would know it would be very difficult to find a 24bit ADC at 250KS/S. My ADC chosen is the AD7685BRM, which is a very nice converter. It's too bad that I am using 8 of everything, which means I got to keep an eye on cost.

I might try to put back to back schottky diodes on the input, to attempt to clamp it to a small input range, but I believe I will need to test this in the lab before I PCB it. I only need a 320mV input range, so I think it may work okay. I am not a big fan of introducing non-linear devices in a linear circuit, but we'll just have to wait and see how it works out.

Thanks very much for your input!!!

knight,

I think the difference amplifier topology is the norm for low-side sensing, which uses a kelvin connection from the sense resistor. Also, the high common-mode requirement is only really beneficial for high-side sensing, not so much for low-side.

Steve