# Help with biasing optocoupler

#### blah2222

Joined May 3, 2010
582
Hi all,

I have attached my circuit design below.

I have a load in which I am switching on a constant current through it. The switching signal is a very low duty cycle pulse (Ton = 100us, Tperiod = 33.33ms) that is coming from a microcontroller. The current pulse that I wish to pass for the attached example is 0.25V/47R ~= 5 mA. The load itself modelled as a resistor in series with a parallel RC, and requires a higher voltage than my 5V source provides, so I have a DC-DC converter to necessitate that.

The PNP connected to the Vcc high voltage rail is essentially the switch that gets the conduction going through the load and I needed to be able to control it via an I/O port on my microcontroller. I am using a 4N33 NPN optocoupler to isolate the 5V switch signal in order to bias it appropriately so that I can turn on the PNP switch.

I figure that both the NPN and PNP in series with the load need to be saturated and will have roughly Vce = +/- 0.3 V (2N3904/906).

Wondering if this bias setup is a reasonable way to get the job done. The high voltage source is going to be upwards of 70V and I wanted to be careful not to damage the optocoupler.

JP

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#### MikeML

Joined Oct 2, 2009
5,444
How does Q2 ever turn on Q3?

#### blah2222

Joined May 3, 2010
582
How does Q2 ever turn on Q3?
Optocoupler receives pulse from microcontroller. LED flashes, darlington NPN passes current through to the base of the PNP to turn it on.

Definitely open to other ideas...

#### #12

Joined Nov 30, 2010
18,224
Passing more positive current to the base of Q3 turns it off. You have a bias direction wrong.

#### blah2222

Joined May 3, 2010
582
Passing more positive current to the base of Q3 turns it off. You have a bias direction wrong.
Ah shoot. Completely missed the mark on that one. Of course, duh!

I'm having much trouble trying to figure out how I can easily switch Q3 on and off in this configuration.

Q3 doesn't have to be a PNP, but I was finding it difficult with it as an NPN as well...

#### blah2222

Joined May 3, 2010
582
I have since modified the circuit and have simulated and tested its operation. Attached are the schematic/sim circuit and a plot of load current.

I had to use a different optocoupler and add another gain stage (for the sim) to it to mimic the 4N33's darlington output.

The sim and test receive similar results but I am still about shaky about its operation. The load current looks fine but I am worried about the initial spike that I see both in test and sim.

1) Does anyone know the culprit of this spike?
2) Should Q1 be saturated for this type of operation (when conducting)?

Thank you.

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#### #12

Joined Nov 30, 2010
18,224
Seems like a lot of parts for a simple job. One simple way of making a constant current device is to apply a fixed voltage to the base of a BJT and use a fixed resistor in the emitter circuit to force a fixed amount of current. There are plenty of BJT's that can survive 70 volts.

For instance. 5.0 volts on the base, .607 volts Vbe, 879 ohms emitter to ground. Presto: 5 ma whenever 5 volts is applied to the base.

Does this help or have I lost track of the goal?

#### blah2222

Joined May 3, 2010
582
Seems like a lot of parts for a simple job. One simple way of making a constant current device is to apply a fixed voltage to the base of a BJT and use a fixed resistor in the emitter circuit to force a fixed amount of current. There are plenty of BJT's that can survive 70 volts.

For instance. 5.0 volts on the base, .607 volts Vbe, 879 ohms emitter to ground. Presto: 5 ma whenever 5 volts is applied to the base.

Does this help or have I lost track of the goal?
Thank you for the response. It was an early idea that was considered, but due to control and stability that I need, it isn't enough. Vbe isn't quite constant and predictable and I am using standard resistors.

My application requires a pulse of current to be controlled by a microcontroller. This includes pulse amplitude, pulse on time, and pulse frequency.

The pulse amplitude is set via the microcontroller serially to a DAC and the DAC output passed through a buffer amp with the base of an NPN in feedback to hold the voltage constant in order to set the desired current of Vdac/47ohm. In my case I have set the DAC voltage to be 0.235 which corresponds to 5 mA through the 47ohm resistor.

The pulse on time and frequency is set via the microcontroller switching an IO pin on and off. The pulse from the microcontroller is 5V max, but my load requires upwards of 5 - 10V across it, so I am using the optocoupler to adjust the bias to switch the PNP on to pass the current set by the 47ohm resistor through the load as well.

#### crutschow

Joined Mar 14, 2008
32,849
If I understand, you want to apply a 5mA, 100μs current pulse to a 560Ω in series with the parallel combination of an 8KΩ resistor and a 0.1μF capacitor. The problem is that the time-constant of the 8kΩ in parallel with the 0.1μF capacitor is 800μs, thus in 100μs the current through the 8kΩ resistor will only reach about 11.7% of its final value or 588μA for a 5mA pulse. Is that a problem? Or are you only concerned about the current through the 560Ω resistor?

#### #12

Joined Nov 30, 2010
18,224
I am so lost here.
This is a 2 terminal circuit that can be set to a rather stable 5.0 ma and it will work as long as you have about 4 volts to run it with.
And the reference page is:

Hang on...that's a 30 volt (max) transistor.

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#### blah2222

Joined May 3, 2010
582
If I understand, you want to apply a 5mA, 100μs current pulse to a 560Ω in series with the parallel combination of an 8KΩ resistor and a 0.1μF capacitor. The problem is that the time-constant of the 8kΩ in parallel with the 0.1μF capacitor is 800μs, thus in 100μs the current through the 8kΩ resistor will only reach about 11.7% of its final value or 588μA for a 5mA pulse. Is that a problem? Or are you only concerned about the current through the 560Ω resistor?
If I am not mistaken the RC constant will affect the voltage but the current will be the desired 5mA pulse through the load as this is what I am driving the load with.

The only consideration of the load voltage is that my supply rail will be able to accommodate it. For testing I am using a 15V dcdc converter but am able to up that to 90V based on how high my peak voltage across the electrodes will be.

I am so lost here.
This is a 2 terminal circuit that can be set to a rather stable 5.0 ma and it will work as long as you have about 4 volts to run it with.
And the reference page is:

Hang on...that's a 30 volt (max) transistor.
I want to be able to control the current amplitude via software not hardware. 5mA is one test case but I want to be able to vary this via software not a potentiometer.

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#### crutschow

Joined Mar 14, 2008
32,849
Below is your circuit simplified with a switch across the load. This gives fast switching since the current through the constant current source doesn't have to change, which is limited by the speed of the op amp. Instead the current is just diverted around the load when the transistor is on.

I didn't see any need for the opto isolator so I left it out. The transistor should adequately isolate the μP output from the high voltage. You can add it back in to drive Q3 if you desire.

The negative current through the load when the transistor turns on is due to the charge on the capacitor discharging through the transistor.

The polarity is such that a logic low from the μP turns the switch off and diverts the constant current through the load.

The one disadvantage of this circuit is that the constant current always flows and will cause power dissipation in Q1 equal to the power supply voltage times the constant current. What is the maximum current you will need?

#### blah2222

Joined May 3, 2010
582
Below is your circuit simplified with a switch across the load. This gives fast switching since the current through the constant current source doesn't have to change, which is limited by the speed of the op amp. Instead the current is just diverted around the load when the transistor is on.

I didn't see any need for the opto isolator so I left it out. The transistor should adequately isolate the μP output from the high voltage. You can add it back in to drive Q3 if you desire.

The negative current through the load when the transistor turns on is due to the charge on the capacitor discharging through the transistor.

The polarity is such that a logic low from the μP turns the switch off and diverts the constant current through the load.

The one disadvantage of this circuit is that the constant current always flows and will cause power dissipation in Q1 equal to the power supply voltage times the constant current. What is the maximum current you will need?

View attachment 64376
Maximum current is 30mA, but more realistically I will be using sub-20 mA based on my measured load impedances.

Very nice idea for switching. I appreciate your time and effort.

I can always set the DAC output to zero and set the current to roughly zero when not in use. The pulse train will only be on for about 3-5 seconds.

The only concern is that the load is directly connected to the high voltage rail and the is a risk of having an immense current driven through it if accidentally grounded and that's why I placed the gating PNP in there.

I will definitely check out this design. Thanks again.

#### crutschow

Joined Mar 14, 2008
32,849
If you gate the constant current with a series PNP, then you will have the problem of the limited response time of the constant-current circuit. You could limit the current with a series resistor or a series current limiter in the power supply line.

#### blah2222

Joined May 3, 2010
582
If you gate the constant current with a series PNP, then you will have the problem of the limited response time of the constant-current circuit. You could limit the current with a series resistor or a series current limiter in the power supply line.
How limited of a response are we talking here?

Also, for my previously posted schematic with the PNP gate transistor. Do you have any idea why there is a large current spike at the beginning of each pulse? I am suspecting it has something to do with the op-amp.

When I wire the circuit the DAC output does not have the spike but the negative terminal of the op-amp does.

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#### crutschow

Joined Mar 14, 2008
32,849
You are correct in your suspicions. The op amp goes into positive saturation when the supply voltage is cut off since it is still vainly trying to generate the constant current. Then when the voltage is suddenly applied to generate the pulse there is a large current spike until the op amp can come out of saturation and stabilize the current. For standard op amps that takes an appreciable time as compared to the pulse width you want. That's why I avoided that by just bypassing the current around the load and never allowing the op amp to saturate.

#### blah2222

Joined May 3, 2010
582
You are correct in your suspicions. The op amp goes into positive saturation when the supply voltage is cut off since it is still vainly trying to generate the constant current. Then when the voltage is suddenly applied to generate the pulse there is a large current spike until the op amp can come out of saturation and stabilize the current. For standard op amps that takes an appreciable time as compared to the pulse width you want. That's why I avoided that by just bypassing the current around the load and never allowing the op amp to saturate.
It's interesting though because both in test and simulation the op-amp doesn't saturate and the spikes are only tens of nanoseconds. Which puzzles me.

In simulation I'm using a LT1006 single-supply and for test a TLC272 single-supply.

#### crutschow

Joined Mar 14, 2008
32,849
It's interesting though because both in test and simulation the op-amp doesn't saturate and the spikes are only tens of nanoseconds. Which puzzles me.

In simulation I'm using a LT1006 single-supply and for test a TLC272 single-supply.
Then I don't understand your circuit. Post the .asc file and I'll take a look at it.

#### crutschow

Joined Mar 14, 2008
32,849
Ok. If you look at the op amp output you will see that the voltage rises to a little over a volt when the transistor is off. This is sufficient for the base-emitter current of the cut-off transistor Q1 to directly raise the voltage across across R2 to equal the .235V from V1. When the switch is turned on then Q1 becomes active and the op amp output voltage drops to about 0.9V. Its the time for the op amp to settle to the new level that generates the spike. In my simulation that takes about 4μs.