#### ah_gal06

Joined Jul 22, 2007
5
i have a few qns for D Flip Flop..
1. if the clock is low, how it will affect the output?
2. if D is connected to NOT Q, what does it mean?

thanks a lot!

#### Dave

Joined Nov 17, 2003
6,960
1. if the clock is low, how it will affect the output?
Nothing will happen, the D-type flip flop is edge-triggered - in the absence of a clock edge the output will remain the same.

2. if D is connected to NOT Q, what does it mean?
On successive clock-edges the input D and output Q will switch from one state to another, i.e. 0-1-0-1-0-1....

Dave

#### hgmjr

Joined Jan 28, 2005
9,029
2. if D is connected to NOT Q, what does it mean?
The end result of this connection scheme as dave has so ably stated is that the output of the latch divides the incoming clock signal by two.

hgmjr

#### ah_gal06

Joined Jul 22, 2007
5
The end result of this connection scheme as dave has so ably stated is that the output of the latch divides the incoming clock signal by two.

hgmjr
huh? what is the meaning of divides the incoming clock signal by 2??

#### beenthere

Joined Apr 20, 2004
15,808
The outputs will change state at half the clock frequency.

#### hgmjr

Joined Jan 28, 2005
9,029
huh? what is the meaning of divides the incoming clock signal by 2??
Oooppppssss!

Beenthere is correct. I should have used the term frequency in my reply.

Sorry for the confusion my omission may have created.

hgmjr

#### ah_gal06

Joined Jul 22, 2007
5
On successive clock-edges the input D and output Q will switch from one state to another, i.e. 0-1-0-1-0-1....

Dave
does it mean that NOT Q will send signal to D then Q will follow D?

sorry if i make u guys confuse.. the image is in the attachment. can u explain to me how the circuit works?

#### Attachments

• 245.5 KB Views: 15

#### hgmjr

Joined Jan 28, 2005
9,029
Based on the diagram you have supplied, you can expect the Q output to change state with each depression of the switch. Some provision for de-bouncing the switch will need to be provided.

hgmjr

#### Dave

Joined Nov 17, 2003
6,960
does it mean that NOT Q will send signal to D then Q will follow D?
Yes, but Q will only follow the change on D at the clock edge - this is a fundamental feature of flip-flops that differentiate them from other such devices such as latches.

For example: D is at 1 and at the clock-edge Q goes to 1 and NOT-Q goes to 0 - this 0 is fed back to D, however Q does not follow D and go to 0 until the clock changes again. It is a cyclic process that alters every time the clock changes.

Dave