hi everyone just had this confusing thing for circuit implementation from ASM chart, it says by the K-map we can find the minimal logic equation to generate the Next State Variable (say nS1 and nS0) and the output (Z) as the function of the current state (S1 and S0).
so how is the relation between the next state variable and the current state? does the next state variable means that it comes from the current state or it is about to go through the current state? thanks very much.
so how is the relation between the next state variable and the current state? does the next state variable means that it comes from the current state or it is about to go through the current state? thanks very much.