Graphical procedure to establish the quiescent poi

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ajinkyakulkarni87

Joined Oct 26, 2005
3
Where I can find the articals related to following title?
Please tell me the answer of this question or tell me the website to
get the answer related to following.....


"Suggest a Graphical procedure to establish the quiescent point(Q-point) for
JFET with voltage divider bias" (6 Marks)


Thank you
Ajinkya Kulkarni
 

mozikluv

Joined Jan 22, 2004
1,437
Originally posted by ajinkyakulkarni87@Oct 26 2005, 04:44 PM
Where I can find the articals related to following title?
Please tell me the answer of this question or tell me the website to
get the answer related to following.....
"Suggest a Graphical procedure to establish the quiescent point(Q-point) for
JFET with voltage divider bias" (6 Marks)
Thank you
Ajinkya Kulkarni
[post=11265]Quoted post[/post]​
hi,

check this out :D
http://www.allaboutcircuits.com/vol_3/chpt_5/4.html
 
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