graph representation

Discussion in 'Homework Help' started by swathi_nisha, Nov 27, 2008.

  1. swathi_nisha

    Thread Starter New Member

    Nov 27, 2008
    i am swathi.
    i have a project in that i have to represent a graph in VHDL.
    i am not able to proceed with the initial step itself.
    can anyone help me out.

    the explaination of graph is as follws:
    example there are 5 nodes in a graph and these nodes are interconnected by some edges, few edges are connected with edge weight '0' and few are connected with edge weight '1'. now i have to represent this graph consisting of nodes and edged in VHDl.
    plz help me out.