Hi, im studying for an exam and I need help. Im pretty new to this subject and this forum so I apologize if i do something wrong.
The question is talking about gate level and design. Question A you must illustrate a logic diagram with NAND 00; OR 01; EX-OR 10 ;ADD 11.
Question B is where I am stuck, it asks for other ways of implementing several bit stages to implement the same functions and speak of the advantages and disadvantages for each.
I know the more gates in a sequence the slower and more expensive it is, as you put more gates on the silicon which is expensive.
Any others?
Thanks in advance.
The question is talking about gate level and design. Question A you must illustrate a logic diagram with NAND 00; OR 01; EX-OR 10 ;ADD 11.
Question B is where I am stuck, it asks for other ways of implementing several bit stages to implement the same functions and speak of the advantages and disadvantages for each.
I know the more gates in a sequence the slower and more expensive it is, as you put more gates on the silicon which is expensive.
Any others?
Thanks in advance.