Need help with the following circuit gate level design.

1.0 Introduction
To gauge the popularity of their television program, UCTV Inc. has retained your (a digital system‟s designer) services. UCTV has divided its viewing area into four regions and has representatives who sample the population in their respective regions. Based on the population, of the regions he/she represents, each representative has a certain number of votes:
Mr. A: 1 Mr. B: 2 Mr. C: 3 Ms. D: 4
Assume that the representatives will indicate their regions inclinations by closing a switch to indicate that an episode was liked and opening a switch to show that the episode was disliked. UCTV is interested in a digital system, which has a (seven segment) display, which indicates the total number of votes that say the episode was liked. If all 10 votes say the episode was liked, the display should show 0 and if all 10 votes say the episode was disliked the display should blank. In the remaining case the display should the decimal equal to liked votes.

Functional Requirements:

1.2.1.1 From the information given above, there are four persons voting each with one, two, three or four votes as shown in Table 1. When a person indicates his/her preference for a TV episode, he/she is casting all his/her votes at once. Dislike of an episode by a person results in no votes cast by that person.

Person Votes Input
Voting Owned Label

Mr. A 1 In[0]
Mr. B 2 In[1]
Mr. C 3 In[2]
Ms. D 4 In[3]



1.2.1.2
The name of the digital system to be developed shall be called SURVEY_MACHINE.
1.2.1.3 Inputs: There are four inputs labeled in[3:0] where in[0], in[1, in[2],
and in[3] correspond the input used by the voter shown in Table 1.
1.2.1.4 Each input is facilitated by on/off switch to allow a person to cast all
Outputs: The output of the SURVEY_MACHINE is an eight-bit bus
attached to a 7-segment LED display that will display the total number
of votes cast by all four persons. The display value vs number of votes
cast is shown in Table 2.


I'm new to this stuff so any help or explanation would be awesome. I have an AIM account if anyone could communicate with me there. It's same as my username here.

 

Something simple like that. It looks like this design should have about 4-5 gates per bit so around 20-24 gates, perhaps more.

I wish I knew how to do this stuff

 

How are you going to learn it, if we do it for you?

Have you made a truth table of your inputs and outputs?

If not, that is a good place to start.

 

That is a good question. If you could teach me how to do it that would be awesome. I'll start with the truth table.

Ms. D (4 Votes)|Mr. C (3 Votes)|Mr. B (2 Votes)|Mr. A (1 Vote)|Expected Sum
0|0|0|0|blank
0|0|0|1|1
0|0|1|0|2
0|0|1|1|3
0|1|0|0|3
0|1|0|1|4
0|1|1|0|5
0|1|1|1|6
1|0|0|0|4
1|0|0|1|5
1|0|1|0|6
1|0|1|1|7
1|1|0|0|7
1|1|0|1|8
1|1|1|0|9
1|1|1|1|0

Logic table, now how do I get it to gate form?

 

Please help, i want to go to bed and have to turn this in at 930 AM EST. Why did I put this off

 

You can make simple two input adders with an AND gate and an XOR gate.
Two of those would reduce your four 0/1 inputs to two 0-2 values.

Look up Adder design and make a 2+2 bit adder which would give you a three bit output.

That's your 0-4 numeric value for display.

 

You can make simple two input adders with an AND gate and an XOR gate.
Two of those would reduce your four 0/1 inputs to two 0-2 values.

Look up Adder design and make a 2+2 bit adder which would give you a three bit output.

That's your 0-4 numeric value for display.

I think the diagram we have to have needs 20 some gates to work. Is there any more info you could provide? Here's what I found for a 4 bit adder. This looks like the stuff we are supposed to do:

 

That adder appears to be separate stages with no internal carry, I'd ignore that.

You are not dealing with one, four bit number.

Think of it as Four numbers which can only be 0 or 1, giving a sum out of 0 - 4.

 

Is the design very complicated? This is stumping me. I obviously don't know this stuff very well, but it is due tomorrow and I have a busy day with an exam to study for the next day.

This was supposed to take most students 5-10 minutes. Can anyone just show me how to create the correct Gate Diagram for this particular problem? I need help

 

I'm going to bed, if anybody knows how to do this and could post that would be awesome. I will check around 8am EST

 

bump bump bump

 

Hello,

Be patient.
There is only 1 hour between your before last post and the bump.
There are also people that have to work.
The members are volunteering here to answer the questions.

Bertus

 

Boy are you screwed.

 

<snip> i need to think fast. 40 minutes

 

i second what retched said.

maybe you will do your homework on time now?

although when i was in college (only 3 years ago - still fresh in my head) i regularly slacked off until the night before, so i am not one to preach i suppose.

good luck - tell your prof you got stuck and ask for help after class, that alone will usually grant you some bonus points.