When I add a gain stage at the end of the low pass filter it kills the response and actually reduces the gain from 0db to -140 db across the frequencies I want to pass. I am using LT spice to simulate the circuit. Any help to figure why this is happening is appreciated.

 

Are you trying to have Gain of 2?

 

yes, the first two stages are the filter and the 3rd stage to amplify the signal.

 

You cannot run an AC signal through an op amp with a single supply unless you bias all the signals and inputs at 1/2 the supply voltage (pseudo ground).
Here's a discussion of that.

The simulation is accurately telling you that you have essentially no gain because the op amp is not biased in the active linear region.

 

Crutschow is totally correct. In addition,the 1K resistors on the last stage are too low, use 10k. Use a quad op amo and use the fourth section fed by a 10K +10K divider to provide Vcc/2. Add a capacitor in series with R1, and then a 10K resistor to the Vin point from the Vcc/2 source. Of course, with any DC offset from the filter amps it may drive the gain stage into a nonlinear zone.
It makes more sense to have gain earlier so as to avoid boosting the added noise from the two stages. Of course, there are some other considerations that may not go along with that idea.

 

This circuit can work in sim if the input generator is offset with a DC offset of
~5.5V. Its +peak amplitude must be < 11V to handle the limitation that input of
first 2 OpAmps is not R-R, its limited to 1V off the high side as a limitation.

Offsetting the signal generator will provide the necessary bias for the signal
path. Or AC couple the input sig gen and bias the stages at (Vcc -1)/2.

The signal path is two stages (filter) with DC G = 1, the last stage G = 2.


Regards, Dana.

 

A sim of just the first stage with offset sig gen -



AC sim attached.

Note you are running out of LPF response at 100Khz due to GBW problem
the OP747 has in its closed loop G 100Khz and higher.

Regards, Dana.

 

danadak explains the offset well.

That is done at the signal source in Spice. Spice allows you to put a bias on the ac signal. Sin (6,1,100) in the schematic means a bias of 6 volts.
The ac sig. is 1vpp

I think the problem is I am limited to a small amount of gain. I have to take a look a the transfer function for the max amount of gain I can use with this filter.

Thanks for all your responses

 

danadak explains the offset well.

That is done at the signal source in Spice. Spice allows you to put a bias on the ac signal. Sin (6,1,100) in the schematic means a bias of 6 volts.
The ac sig. is 1vpp

I think the problem is I am limited to a small amount of gain. I have to take a look a the transfer function for the max amount of gain I can use with this filter.

Thanks for all your responses

Gain is limited by gain bandwidth product of opamp.

 

What is the signal amplitude at the output of U2, before the filter? Also, what is the highest frequency of interest?

ak

 

If the input signal is the same as the maximum swing of the first two stages, then a gain of 2 following stage would output twice that much, which is not possible in the circuits shown. Reduce the input signal to 1 volt peak to peak, with the offset the same, and check the output. My thinking is that it should work.

 

A gain of 2 will DC saturate the output stage if the input signal is biased at 6V.
To prevent that, connect a capacitor between R2 and ground, which will then give a DC gain of 1 for that stage.
The capacitor should be large enough so that the 1/2πR2C rolloff is well below your lowest frequency of interest.

 

What is the intended corner frequency of the overall 5-pole lowpass filter?

Also, your network impedances are kinda low. The datasheet lists a typical output current of only 10 mA, and at that current the output is sagging by 1 V below its intended value.

ak

 

I missed the DC getting gained up, here is a working example for 2.5V AC in.
Blue line output of second stage, Green 3'rd stage.

 

Here is AC response -



Regards, Dana.

 

AC out to 1 Mhz -

 

%AnalogKid the AC output is 1V on a 6vdc bias. This is for filtering an audio output from a pwm so I am interested in frequencies up to 20KHz.

By network impedance are you taking about the 1K load R7 ?


@MisterBill2 The input is 1V ac so I have plenty of head room.

@crutschow I missed the dc gain, so with a gain of two my dc bias will be amplified to
12vdc oops, makes sense.

@danadak I will take a look the circuit, thanks.

 

So I added 100uf cap to get rid of the dc bias and that did the trick. Thanks to everyone who replied.