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Fully DIfferential Switch Capacitor gain of two

Discussion in 'The Projects Forum' started by Hurt_it_Circuit, Mar 11, 2014.

  1. Hurt_it_Circuit

    Thread Starter Member

    Oct 2, 2012
    Any ideas about where to start simulating such a circuit? Should the W/L 's vary from switch to switch? Clock frequency needs to be set to 50MHz with a rise and fall time of 0.5ns. I am allowed to use two ideal non overlapping clocks that can run from rail to rail (Vdd to ground).
  2. LvW

    Well-Known Member

    Jun 13, 2013
    Where to start?
    At first you have to decide what you want to see as a simulaton result.
    That means: Simulation in the time domain or in the frequency domain?