Frequency Doubler

Thread Starter

karunanithi_pricol

Joined Mar 13, 2006
19
Hi Everyone
I have to design a frequency doubler circuit. In which the input frequency will be coming from a speed sensor(Hall effect) and i have to double the frequency with the same voltage level as the input.

* Input frequency range will be 0 to 100 Hz Sine Wave with +/-5V amplitude.

Can anyone suggest me a cost effective solution for this requirement?

Regards
Karunanithi.R
 

Papabravo

Joined Feb 24, 2006
13,551
Originally posted by karunanithi_pricol@Mar 13 2006, 05:31 AM
Hi Everyone
I have to design a frequency doubler circuit. In which the input frequency will be coming from a speed sensor(Hall effect) and i have to double the frequency with the same voltage level as the input.

* Input frequency range will be 0 to 100 Hz square wave

Can anyone suggest me a cost effective solution for this requirement?

Regards
Karunanithi.R
[post=14927]Quoted post[/post]​
If the output does not need to be a 50% duty cycle square wave, an exclusive-OR gate with a single pole low pass filter on one input can be used to produce a pulse on each edge. The values of R and C will control the pulse width.

I don't know if they make these parts anymore but a double edge triggered one-shot will also do the trick. The problem with these quasi-analog digital circuits is that the location in time of the trailing edge can not be accurately controlled.

If you want to be really clever you could use a phase lock loop to phase lock a higher frequency signal to your input and then divide it down by the appropriate amount. This may not work well if the input drops to zero frequency.
 

Papabravo

Joined Feb 24, 2006
13,551
Originally posted by karunanithi_pricol@Mar 13 2006, 05:31 AM
Hi Everyone

...
* Input frequency range will be 0 to 100 Hz square wave
...
[post=14927]Quoted post[/post]​
Attached is a drawing of a frequency doubler that works in simulation.
Pulse width is approximately 0.693*R*C

Hope this helps
 

Mazaag

Joined Oct 23, 2004
255
Originally posted by Papabravo@Mar 13 2006, 01:29 PM
Attached is a drawing of a frequency doubler that works in simulation.
Pulse width is approximately 0.693*R*C

Hope this helps
[post=14942]Quoted post[/post]​
Papa,
Could you just give me a brief explanation of how the frequency is doubled in this circuit?

I understand that the XOR outputs a 1 when inputs are (01, 10 ).

Here is attempt on understanding this circuit.

Lets say we have an input square wave of 100Hz. As the input goes high, we start charging up the capacitor. The output of the XOR will remain high ( inputs to XOR are logical 1 for input square wave & 0 for voltage across cap ) until the capacitor charges up to TTL high, then the XOR will go low ( 1 1 ).
No further changes will take place until the input square wave drops down to low, causing the capacitor to discharge. The output of remains high ( 0 1 ) as the capacitor discharges, until the voltage across the capacitor drops below ttl high , causing the output to drop to low ( 0 0 ). The output will remain at this state till the square wave goes high, and the cycle repeats.

(Papa, Did that make any sense ? )

That means , if we want the duty cycle to be 50% , we have to adjust our RC such that the time it takes the capacitor to charge up to TTL high is equal to the timeperiod/2.
 

Papabravo

Joined Feb 24, 2006
13,551
Originally posted by Mazaag@Mar 24 2006, 04:37 PM
Papa,
Could you just give me a brief explanation of how the frequency is doubled in this circuit?

I understand that the XOR outputs a 1 when inputs are (01, 10 ).

Here is attempt on understanding this circuit.

Lets say we have an input square wave of 100Hz. As the input goes high, we start charging up the capacitor. The output of the XOR will remain high ( inputs to XOR are logical 1 for input square wave & 0 for voltage across cap ) until the capacitor charges up to TTL high, then the XOR will go low ( 1 1 ).
No further changes will take place until the input square wave drops down to low, causing the capacitor to discharge. The output of remains high ( 0 1 ) as the capacitor discharges, until the voltage across the capacitor drops below ttl high , causing the output to drop to low ( 0 0 ). The output will remain at this state till the square wave goes high, and the cycle repeats.

(Papa, Did that make any sense ? )

That means , if we want the duty cycle to be 50% , we have to adjust our RC such that the time it takes the capacitor to charge up to TTL high is equal to the timeperiod/2.
[post=15386]Quoted post[/post]​
Yes that is correct. The frequency is doubled because there are now two edges on the output for each edge on the input. If you want the duty cycle to be 50% for all input frequencies then you are out of luck with this circuit. Sure you can adjust it for one frequency but that's pretty much it.
 

hgmjr

Joined Jan 28, 2005
9,029
Originally posted by karunanithi_pricol@Mar 13 2006, 04:31 AM
Hi Everyone
I have to design a frequency doubler circuit. In which the input frequency will be coming from a speed sensor(Hall effect) and i have to double the frequency with the same voltage level as the input.

* Input frequency range will be 0 to 100 Hz square wave

Can anyone suggest me a cost effective solution for this requirement?

Regards
Karunanithi.R
[post=14927]Quoted post[/post]​
One way that you may consider is to take a frequency to voltage converter and then feed the voltage output from the F-to-V through an opamp with a gain of 2 and use the output of the opamp to feed a voltage to frequency converter.

The two signal will not be locked together but the output of the v-to-f will be 50% duty cycle.

Another approach that would be effective though a bit more involved would be to use a phaselock loop circuit with a divide by 2 in the feedback path.

hgmjr
 

Thread Starter

karunanithi_pricol

Joined Mar 13, 2006
19
Originally posted by hgmjr@Mar 26 2006, 02:37 AM
One way that you may consider is to take a frequency to voltage converter and then feed the voltage output from the F-to-V through an opamp with a gain of 2 and use the output of the opamp to feed a voltage to frequency converter.

The two signal will not be locked together but the output of the v-to-f will be 50% duty cycle.

Another approach that would be effective though a bit more involved would be to use a phaselock loop circuit with a divide by 2 in the feedback path.

hgmjr
[post=15441]Quoted post[/post]​
Hi Everyone
Sorry for this, infact the input signal will be 0-100 Hz sinewave (instead of square) with +/- 5V amplitude.

Can anyone suggest me a solution for this design?

Regards
Karunanithi.R
 

Ron H

Joined Apr 14, 2005
7,014
Doubling zero Hertz is easy. What's tough is doubling 1 cycle per year. You need to set a realistic low frequency limit.
 

Papabravo

Joined Feb 24, 2006
13,551
Originally posted by karunanithi_pricol@Mar 27 2006, 11:46 PM
Hi Everyone
Sorry for this, infact the input signal will be 0-100 Hz sinewave (instead of square) with +/- 5V amplitude.

Can anyone suggest me a solution for this design?

Regards
Karunanithi.R
[post=15507]Quoted post[/post]​
A full wave rectifier or a bridge rectifier will double the frequency, but it won't be a sine wave anymore. You did not say it had to be a sine wave out right?

If it has to be a sine wave, an analog multiplier might do the job with the input signal tied to both multiplier inputs. The square of a sine wave contains frequencies at the second harmonic only. There are chips which work at RF frequencies that are designed to do this also. They are generally used to create signals beyond the range of traditional oscilllators, in the hundreds of megahertz to hundreds of gigahertz range.

You could probably do it with a DSP, an A/D converter and a D/A converter.
 

Thread Starter

karunanithi_pricol

Joined Mar 13, 2006
19
Originally posted by Papabravo@Mar 28 2006, 11:03 AM
A full wave rectifier or a bridge rectifier will double the frequency, but it won't be a sine wave anymore. You did not say it had to be a sine wave out right?

If it has to be a sine wave, an analog multiplier might do the job with the input signal tied to both multiplier inputs. The square of a sine wave contains frequencies at the second harmonic only. There are chips which work at RF frequencies that are designed to do this also. They are generally used to create signals beyond the range of traditional oscilllators, in the hundreds of megahertz to hundreds of gigahertz range.

You could probably do it with a DSP, an A/D converter and a D/A converter.
[post=15511]Quoted post[/post]​
Hi
Since i am verymuch new to the controllers; i am looking for a analog solution. Minimum input frequency will be 1Hz.

Regards
Karunanithi.R
 

Papabravo

Joined Feb 24, 2006
13,551
Originally posted by karunanithi_pricol@Mar 28 2006, 05:37 AM
Hi
Since i am verymuch new to the controllers; i am looking for a analog solution. Minimum input frequency will be 1Hz.

Regards
Karunanithi.R
[post=15515]Quoted post[/post]​
Then the analog multiplier, such as an Analog Devices AD633 is the ticket you need.
 

n9352527

Joined Oct 14, 2005
1,198
Originally posted by Papabravo@Mar 28 2006, 01:56 PM
Then the analog multiplier, such as an Analog Devices AD633 is the ticket you need.
[post=15525]Quoted post[/post]​
How does an analogue multiplier double the frequency?
 

Mazaag

Joined Oct 23, 2004
255
Originally posted by n9352527@Mar 28 2006, 08:37 AM
How does an analogue multiplier double the frequency?
[post=15528]Quoted post[/post]​

"The square of a sine wave contains frequencies at the second harmonic only." from Papa's post
 

n9352527

Joined Oct 14, 2005
1,198
Originally posted by Mazaag@Mar 28 2006, 04:15 PM
"The square of a sine wave contains frequencies at the second harmonic only." from Papa's post
[post=15538]Quoted post[/post]​
Right. So it has to be a four-quadrant multiplier?
 

Thread Starter

karunanithi_pricol

Joined Mar 13, 2006
19
Originally posted by Papabravo@Mar 29 2006, 06:27 AM
The AD633 is just such a four quadrant multiplier.
[post=15550]Quoted post[/post]​
Hi
Thanks for the response, Analog multiplier can be used for higher frequencies(in Khz to Mhz) will this multiplier be accurate for low frequency(Max 100 Hz)?
Is it possible to design this product using op-amp?

Regards
Karunanithi.R
 

hgmjr

Joined Jan 28, 2005
9,029
Originally posted by Papabravo@Mar 28 2006, 07:56 AM
Then the analog multiplier, such as an Analog Devices AD633 is the ticket you need.
[post=15525]Quoted post[/post]​
Here is the trigonometric identity on which papabravo's recommendation hinges.

sin(2 ω ) = 2 [sin( ω ) * cos ( ω ) ]

This identity states that the product of the sine of frequency ω and its cosine results in the doubling of the frequency.

The challenge will be generating the 90 degree phase shifted version of your input frequency.

hgmjr
 

n9352527

Joined Oct 14, 2005
1,198
I've just realised that there are two ways to approach the frequency doubling through analogue multiplication. My initial understanding was that the relationship would be along the line of:

sin^2(ω) = 1/2 [ 1 - cos(2ω) ]

Where the resulting sinusoidal wave would have a finite offset and phase shift.

Using the identity that hgmjr posted out above, there would be no offset and no phase shift but would require an exactly 90˚ input shift. I believe that an RC network can be used to shift the phase and the phase shift doesn't have to be exactly 90˚ to get an accurate frequency. The phase shift error does, however, affect the offset and of course the amplitude of the resulting waveform.
 

Papabravo

Joined Feb 24, 2006
13,551
As you suggest, these circuits are in the AD633 datasheet, including the use of an RC to produce the 90 degree phase shift. The data sheet suggests that the output has a flat response from DC to about 1 MHz.
 

Ron H

Joined Apr 14, 2005
7,014
An analog phase shift network that is 90 degrees from 1Hz to 100Hz is probably impossible, or at least very difficult, to implement. Here is a good reference.
 
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