Hello

I've been doing some reading and I've come up with the following question:

Why are FPGAs used in high-end products by big companies like Agilent
instead of ASICs? From what I read an FPGA equivalent ASIC is much faster and more power efficient so why use FPGAs at all?
Is it a matter of cost of developing an ASIC for every task (I know they cost alot to develop) or is it the fact that FPGAs are more versatile and can be reprogrammed very quickly.

 

If you are working on a high end project, which takes quite a bit of time to do with an FPGA, I can imagine how much it takes to design an ASIC to do its job. I guess it is because of the complexity of the ASIC solution compared to using a FPGA chip. I guess the target market for high end technology can't get enough devices sold in order to repair for the investment of designing an ASIC to do the job. Imagine you are a company that invest so much resources in designing an ASIC to be used in an oscilloscope. How many of those oscilloscopes would you need to sell and what has to be the price for the end customer to cover your D&D costs? When you use ASICs you profit from the number of devices sold, if you can't sell plenty it's not worth it.

 

It's very easy to revision the configuration of an FPGA, not so much with an ASIC.

The ASIC, while it may be better in speed and power efficiency, cannot be modified or updated. Add to that the huge upfront cost of ASIC design and most designers/project managers using a FPGA instead.

If a design gets updated what do you do with the ASIC?

 

Yes well that's what I thought , thanks for the answers mitko and tshuck !

Why is it so expensive to develop an ASIC ? I thought that with the years the cost would have come down.
Do you think that in a few decades it will come down to the hobbyist level where anyone can design their own ASIC and get it manufactured like we do with PCBs today?

 

Yes well that's what I thought , thanks for the answers mitko and tshuck !

Why is it so expensive to develop an ASIC ? I thought that with the years the cost would have come down.
Do you think that in a few decades it will come down to the hobbyist level where anyone can design their own ASIC and get it manufactured like we do with PCBs today?

Back when I was involved in custom ASIC prototype manufacturing the batch cost for a small 10 wafer run was about $50,000 a small wafer (5 or 6 inch). You need to create all the photo masks and recipes for every process step. We had a custom Ion beam lithography machine to make most the masks but it still took a least month to push out the first chip from the silicon wafer after the design was done.

You need at staff of:
A Product Definition Engineer
Analog Design Engineer
Digital Design Engineer
Place and Route (P&R) Engineer
System Simulation Engineer
Layout Designer
Test Engineer
Quality Engineer
Product Engineer
Application Engineer
Program Manager

That's just some of the people needed for the design not including the actual fabrication requirements. Unless you are a large government entity or need millions of parts it's very expensive because you just can't automate creative design (yet).

 

Heh , thanks for the info . Sounds like alot of work.

 

I worked at a place where the engineer sitting behind me was designing an ASIC. Costs ran approximately 100-200K, plus another 75K for any changes.

The circuit was designed and simulated in Orcad from modles provided by the IC manufacturer's library. That output was emailed to the vendor, and UPS sent back the chips.

You can rent experienced talent easier then you can hire it.

 

ASIC's have a large NRE but smaller cost per unit. FPGAs have a small NRE but higher per unit cost. FPGA's can be changed whereas ASICS cannot. When a product matures and is the quantities get high enough, an OEM might consider switching from FPGA's to ASIC's.


I design both FPGA and ASIC.

 

Our shop did everything internally (US and foreign based facilities). Full custom ASIC with ATE, bonding and packaging. I only worked in the e-beam engineering group but it was pretty cool stuff in the 1990s.

Our e-beam system was a R&D version of something like this: http://nanolithography.gatech.edu/JEOL_JBX-9300FS_Training.pdf

As you said the NRE for a small run could be outlandish but some costumers gladly paid the price to have a running product to demo.

FPGA vs ASIC costs
http://www.eng.auburn.edu/~nelson/courses/elec5250_6250/Lecture%202%20-%20ASIC%20Cost.pdf