Flip flop JK chip

Thread Starter

Don23

Joined Feb 22, 2011
10
I'm testing a SN7476 chip on a breadboard. I wired the chip in an attempt to toggle the Q output voltage from high to low, back and forth. The J, K, PRE, CLR pins of the SN7476 chip are all set to 5v high. The CLK input is connected to the "3" pin output of a 555 chip running on the same breadboard and sharing the same power source. The pattern of the oscillation is about 0.8 seconds high/0.08 seconds low.

Here's the problem. The Q output on the chip only shifts in voltage from about 0.6v to about 0.8v. I was expecting the output of Q to be something like 3v or better, then close to 0v. There are actually 2 flips flops on this SN7476 chip. I tried both flip flops and they both act the same way.

Any ideas as to what might be causing the voltage output issue? The SN7476 are not using any resistors to control current/voltage inputs or outputs. I have an oscilloscope and can see the voltage levels, but am not sure what else to try.
 

WBahn

Joined Mar 31, 2012
26,141
Are you sure you are powering the SN7476 correctly?

What is the voltage on the Q' output?

Do the outputs behave as expected when you take PRE and/or CLR to a LO level?
 

MrChips

Joined Oct 2, 2009
21,823
Did you connect to the correct Vcc and GND pins of the 7476 IC?

Vcc = pin 5
GND = pin 13

Can you post a photograph of your layout?
 

Thread Starter

Don23

Joined Feb 22, 2011
10
My apologies. The GND pin was mis-wired. Attached are a couple of photos of the now working flip flop chip output and breadboard. The attached image of the oscilloscope shows two traces:
1) the lower trace of the 555 input signal.
2) the upper trace of the flip flop chip Q output.

One followup question. The datasheet for the SN7476 claims the chip is a "positive edge" chip. If so, I would have expected the "upswing" edge of the upper trace to be aligned with the "upswing" edge of the lower trace. Instead the upswing upper trace is aligned with the downswing lower trace. Can anyone explain the logic of this?

Thanks again for you help.
 

Attachments

MrChips

Joined Oct 2, 2009
21,823
The 7476 JK flip-flop is called a "master-slave" flip-flop.
The J and K inputs are latched on the rising edge of the clock.
Q and Q' outputs change on the falling edge of the clock.
 
Last edited:

WBahn

Joined Mar 31, 2012
26,141
My apologies. The GND pin was mis-wired. Attached are a couple of photos of the now working flip flop chip output and breadboard. The attached image of the oscilloscope shows two traces:
1) the lower trace of the 555 input signal.
2) the upper trace of the flip flop chip Q output.

One followup question. The datasheet for the SN7476 claims the chip is a "positive edge" chip. If so, I would have expected the "upswing" edge of the upper trace to be aligned with the "upswing" edge of the lower trace. Instead the upswing upper trace is aligned with the downswing lower trace. Can anyone explain the logic of this?

Thanks again for you help.
Do you have a SN7476, or a SN7476A?
 

WBahn

Joined Mar 31, 2012
26,141
If you look closely at the first page, you will see a description of the difference between the '76 and the '76A parts. For many applications, the distinction isn't important. Since your J and K are tied HI (i.e., are fixed and static), the distinction doesn't matter.
 
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