How to make a D-flip flop down counter count from 5 to one on schematics???

 

Prepare a state transition table with present and next states you may require 3 D flip flops
You can select appropriate inputs to that d ff's using excitation table of d ff as follows
present_state next_state D
0 0 0
0 1 1
1 0 0
1 1 1
using this table prepare input combinations to all flip flops
then using k map prepare equation for each input to d flip flop which is a function of different state values.
prepare schematic , it is so simple.
give all the outputs to nor gate and connect nor gate output to clear input of all the flip flops so that counting stops after 0 is encountered.

 

How to make a D-flip flop down counter count from 5 to one on schematics???

Give this thread a read. It describes how to make a synchronous, mod-10 counter, but the idea is the same regardless of whether it is an up counter, down counter, gray code counter, etc. If you understand the process, you can make it follow any kind of state transitions you want.