Hi there
Im wondering if anyone here have some toughts on using ferrite filters on their AVCC/DVCC right after the regulator output.
My setup is powered from an xilinx card from an fmc connector.
It delivers switched supply at 3V3 and 2V5
http://www.xilinx.com/products/boards/sp601/reference_designs.htm
On my board i use this LM2831Z High Frequency 1.5A - Step-Down DC-DC
Its switching at 3Mhz and regulates from 3V3 to 1V8.
http://cache.national.com/ds/LM/LM2831.pdf
I must add that the buck regulator acts as a LC filter in itself.
This again supplies the high speed analog to digital converter (adc). It samples at 100MSPS. Its decoupled with 10nF and 1uF caps localy.
The noise that reaches the adc via the supply needs to be minimized.
Wish i had a -140dB noise floor on the samples
Im considering an ferrite filter between the 1V8 regulator and the adc.
BLM18PG331SN1
http://search.murata.co.jp/Ceramy/image/img/PDF/ENG/L0110S0100BLM18P.pdf
An 1Amp ferrite bead that gets to 330 Ohm when passing 100Mhz
And less than 0.2 Ohm for dc currents.
Wide band version, to prevent most of the high freq noise thru.
Im certain the regulator makes noise at 3Mhz.
When the ferrite hits 50 Ohm at that freq, will that be sufficient to dampen som of the noise?
In addition i want to place a 1nF ceramic capacitor to ground in front of the bead, viewed from the supply regulator.
Regulator <-----> 1nF to GND <-> Ferrite <----------> ADC
Anyone have some knowledge on how this will behave?
And is there some issues that may appear that i must know of?
Kind regards,
Thor
Im wondering if anyone here have some toughts on using ferrite filters on their AVCC/DVCC right after the regulator output.
My setup is powered from an xilinx card from an fmc connector.
It delivers switched supply at 3V3 and 2V5
http://www.xilinx.com/products/boards/sp601/reference_designs.htm
On my board i use this LM2831Z High Frequency 1.5A - Step-Down DC-DC
Its switching at 3Mhz and regulates from 3V3 to 1V8.
http://cache.national.com/ds/LM/LM2831.pdf
I must add that the buck regulator acts as a LC filter in itself.
This again supplies the high speed analog to digital converter (adc). It samples at 100MSPS. Its decoupled with 10nF and 1uF caps localy.
The noise that reaches the adc via the supply needs to be minimized.
Wish i had a -140dB noise floor on the samples
Im considering an ferrite filter between the 1V8 regulator and the adc.
BLM18PG331SN1
http://search.murata.co.jp/Ceramy/image/img/PDF/ENG/L0110S0100BLM18P.pdf
An 1Amp ferrite bead that gets to 330 Ohm when passing 100Mhz
And less than 0.2 Ohm for dc currents.
Wide band version, to prevent most of the high freq noise thru.
Im certain the regulator makes noise at 3Mhz.
When the ferrite hits 50 Ohm at that freq, will that be sufficient to dampen som of the noise?
In addition i want to place a 1nF ceramic capacitor to ground in front of the bead, viewed from the supply regulator.
Regulator <-----> 1nF to GND <-> Ferrite <----------> ADC
Anyone have some knowledge on how this will behave?
And is there some issues that may appear that i must know of?
Kind regards,
Thor
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