# Feedback Amplifier Design Project @ 5th Semester

#### TheExtremist

Joined Apr 26, 2010
5
Hey ;

I am a student of Yeditepe University in Turkey at 5th semester.Today,our EE331 (Electronics I) course instructor gave us an feedback amplifier design project with respect to given specifications below ;

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Input Impedance = 50k

Input Sensitivity = 2.5mV rms at 1Khz

Rated Output = 2V peak at rated input sensitivity across a load of 10k

Bandwidth = 20hz to 20khz (-1dB)

T.H.D. =Less than 0.1% from 20hz to 20khz at rated output

Hum And Noise = -65 dB at rated output at 1 KHz

Power Supply Requirements = Single

Maximum Transistors Per Project = 2

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I am so confused that i do not know how to start calculations etc. Should i realize this circuit MOS or BJT ? How can i determine the feedback topology, amplifier configuration (CE,CC.. etc.).So i need your help,recommendations to create my own feedback amplifier.

#### PRS

Joined Aug 24, 2008
989
What about the gain? That's usually a major design parameter. Is it implied by the maximum 2V peak output divided by the input sensitivity of 2.5mV rms? This sensitivity would be 2.5 mV *sqrt(2) =3.54 mV peak. Therefore the closed loop gain would be 2/3.54 mV = 577V/V. Is this correct? If so, this would require an open loop gain of 1000 or more.

If I'm not interpreting this problem right, let me know. If anyone else can help, feel free to jump in.

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#### TheExtremist

Joined Apr 26, 2010
5
There is no information about gain on design sheet that i was given by instructor.But ,your calculations make sense. 2 / 5mV = 400 , it may be the gain I ask that to my course instructor tomorrow.

#### PRS

Joined Aug 24, 2008
989
There is no information about gain on design sheet that i was given by instructor.But ,your calculations make sense. 2 / 5mV = 400 , it may be the gain I ask that to my course instructor tomorrow.
Note that my first post was wrong in that Vpeak does not equal Vrms*2, but rather Vpeak*sqrt(2) The gain is over 500 and this is closed loop gain, not open loop gain. For open loop gain we need about 1000 or more.

I'll find a circuit configuration and then we can work on the numbers.

#### PRS

Joined Aug 24, 2008
989
The input impedance is too high to use a CE at the input, a CC or a FET will have to be used, I think.

Another problem is the -65 dB noise hum and noise at 1 kHz and yet the Bandwidth is 20 Hz to 20kHz. I'm not sure I understand this. Could you get your instructor to draw a transfer function showing his meaning?

The 2 transistors mean the first gets your high input impedence and the second gets your high voltage gain will driving a 10k resistor. There will be a negative feedback path from the output of the second transistor to the input of the first transistor.

This path will include at least one resistor, probably two such that you get your overall gain of about 577 V/V. This will stabalize the circuit and increase the input resistance.

#### TheExtremist

Joined Apr 26, 2010
5
2,5mv RMS = 3,54mV Peak that's true,i missed that too.

But,i'm not sure that we can calculate gain as you did? (2V / 3.54mV = 577 )

#### PRS

Joined Aug 24, 2008
989
2,5mv RMS = 3,54 Peak that's true,i missed that too.

But,i'm not sure that we can calculate gain as you did? (2 / 3.54 = 577 )
notice the 3.54 is millivolts, not volts. But you're right, it's 565 V/V.

#### TheExtremist

Joined Apr 26, 2010
5
The input impedance is too high to use a CE at the input, a CC or a FET will have to be used, I think.

Another problem is the -65 dB noise hum and noise at 1 kHz and yet the Bandwidth is 20 Hz to 20kHz. I'm not sure I understand this. Could you get your instructor to draw a transfer function showing his meaning?

The 2 transistors mean the first gets your high input impedence and the second gets your high voltage gain will driving a 10k resistor. There will be a negative feedback path from the output of the second transistor to the input of the first transistor.

This path will include at least one resistor, probably two such that you get your overall gain of about 577 V/V. This will stabalize the circuit and increase the input resistance.

I will ask my instructor to give me detailed information on this subject tomorrow,then we can discuss properly.

#### PRS

Joined Aug 24, 2008
989
I have another question, this with regard to the sensitivity. After thinking it over, I believe your professor means Beta independence. This means that given two differing transistors of the same type (such as 2N3904s) may have extremes of Bmax and Bmin. The sensitivity would then mean by exchanging such transistors in your circuit the output will change by only 2.5mV or less. Is this correct? Or is it 2.5mV*closed loop gain? Or am I wrong about the whole idea of sensitivity? Sometimes a change in temperature is meant since the gain is related to the ambient temperature via re = Vt/Ie where re is the resistance looking into the emitter and figures as part of the gain.

I doubt the gain is as high as I calculated above since this is a negative feedback circuit. The idea here is to have a large open loop gain and a smaller closed loop gain. By trading this gain we get greater bandwidth, lower distortion and so on.

Another thing I'm confused about is the -65dB hum at 1kHz. The spec calls for a bandwidth of 20 - 20k hertz. Hum, to me means 60 Hz (USA) hum from a power transformer or any amplification of the power line voltage. So this doesn't make sense to me.

You're limit of 2 transistors, coupled to the fact you have high input resistance, probably means a a Series-Shunt amplifier. Check out figure 6:

http://users.ece.gatech.edu/~mleach/ece3050/notes/feedback/fdbkamps.pdf

Finally, the load is 10k. Can the collector resistor of stage 2 be considered the load, or is the load separate and fed by an output capacitor? This will make a difference in the design.

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#### The Electrician

Joined Oct 9, 2007
2,848
Another thing I'm confused about is the -65dB hum at 1kHz. The spec calls for a bandwidth of 20 - 20k hertz. Hum, to me means 60 Hz (USA) hum from a power transformer or any amplification of the power line voltage. So this doesn't make sense to me.
I wonder if the hum spec is for something like power supply rejection ratio?

#### PRS

Joined Aug 24, 2008
989
Maybe. But how do you reject a 60Hz frequency from an amplifier that is supposed to have a bandwidth that includes that frequency? Answering my own question with your response, I think you're right. We need to decouple the supply voltage with a simple RC filter that has a bandwidth such that 65dB at 1kHz is rejected. This will be easy. It's just a capacitor and a resistor.

#### JoeJester

Joined Apr 26, 2005
4,390
The hum, I assume, is the power supply hum. 60 Hz for half-wave or 120 Hz for full wave rectifiers. That is unwanted and reduced by the filter capacitors. Depending on their Vcc, it could be as simple as a 78xx voltage regulator and the associated filter capacitors.

The audio signal is wanted and not filtered (within the specifications).

#### PRS

Joined Aug 24, 2008
989
Yes, I think this is what the spec means. I doubt the prof would like an IC in this circuit. I think simple decoupling with an RC filter is what is wanted.

#### PRS

Joined Aug 24, 2008
989
Another question. Is the bandwidth between 20 Hz and 20 kHz? Or are these just minimums and maximums?

Is Rin = 50K a minimum?

As for the gain, I think I have figured it out. Your prof is asking for an output of 4V peak to peak. The distortion requirements seem to be forcing the gain to be 40 overall. This is because you can't put more than 10mV into a totally bypassed CE stage without getting harmonic distortion. And when you partially bypass such a stage, you can put about 100mV into it. Hence a gain of 40, closed loop.

By the way, this is a high fidelity audio pre-amplifier such as one that might amplify the stylus of a record player. I'm guessing this from the bandwidth and the low noise and low harmonic distortion requirements.

This project intrigues me. I put together an amplifier based on figure 6 that I linked you to above. I've had some success but not enough to meet your prof's requirements.

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#### PRS

Joined Aug 24, 2008
989
This problem made me curious and so I just had to breadboard the project. I used fig 6 in the link I gave above and met all the specs. So that design is a winner. The only spec I'm not sure about is the THD. I don't have a spectrum analyser to investigate this, but I get pure sine, triangle, ramp, and square waves. So I think this design meets all the criteria.

#### TheExtremist

Joined Apr 26, 2010
5
I told my questions to my instructor and then she gave me some hints;

1)In order to set the input resistance easily she suggested me to use MOS instead of BJT.Because in BJT's small signal modell the input resistance consists of R1//R2//R∏ (where R1 R2 are Base Voltage Divider resistances and R∏ is the resistance occurs from fabrication process).She told me that you can easily set the input resistance by only choosing Voltage Divider resistances in MOS.

2)How can i calculate the gain? She asked this question ;

You can calculate it by dividing Output/İnput.In the project that gave you, i mentioned input , by saying "input senstivity". So our input sensitivity is our input (2,5mV RMS).By doing appropriate calculations (RMS-Peak) you can calculate your gain.

3)How Hum or THD effect our circuit design?

She said that do not think about them i gave that specifications just for extra information.The important thing is your feedback configuration.

In this project we can see that that is voltage amplifier.But how can i decide its feedback configuration shunt-voltage or series-voltage?

#### PRS

Joined Aug 24, 2008
989
Hello Extremist. Like I said below, this problem made me curious and I designed my own interpretation of the problem. Using the diagram from fig. 6 I created a biasing circuit and built it on a breadboard.

After testing it, I get 50K input resistance, 4 volts peak to peak output, and no noticeable distortion from a variety of waveforms. There may still be confusion about the gain.

This circuit has an open loop gain of about 220 V/V with a closed loop gain of 43. It's the closed loop gain that gives a nondistorted output signal. When removing the feedback resistor, Rf, there is distortion.

It is also the feedback that makes Rin = 50K possible. This is due to a partially unbypassed emitter resistor on Q1 and partly due to the negative feedback obtained by Rf.

It is also the relatively low output resistance due to negative feedback that enables this circuit to drive 10K with little attenuation.

This is all consistent with feedback theory. There are formulas in your textbook for them. See the formulas for a series shunt configuration.

Briefly:
Zin goes up with feedback
Zout goes down
Av goes down
BW goes up

We are trading gain for these features. Also the bandwidth is 10Hz to 250 kHz. If the exact bandwidth in the specs are wanted then they can be created by our choice of capacitors. Ask your teacher if the BW is to be realized exactly or if you can improve the performance by exceeding the specs.

More if you want. I'll help you with the biasing considerations. But here's a hint. Start by determining the dc voltage at the output, remembering you need the signal to swing through 4 volts peak to peak.

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