Fast frequency to voltage conversion?

Thread Starter

Dyslexicbloke

Joined Sep 4, 2010
565
Hi folks.
I have been working on my CHP project ...(http://www.navitron.org.uk/forum/index.php/topic,12943.0.html) and due to the limitations of the PLC that I am using (It was free) I need to build a frequency to voltage interface board.

I would like to convert frequency to voltage, I am currently working with 50 Hz but could change this by modifying the shaft encoder. Assuming the target stays at 50 Hz I will need a 0 -10v signal that represents 40 – 60 Hz ideally, although 0 – 60 Hz would probably work all be it with lower resolution.

I appreciate that a simple integrator looking at the square frequency will work but if I use a cap big enough to limit the ripple to an acceptable level then the system is far to slow.

I probably need some sort of sample and hold circuit looking at each individual pulse width but really don’t know where to start.
Any input would be greatly appreciated.

( I have some analogue switch IC’s, bought to multiplex the PLC inputs, if that helps at all. )
Thanks
Alistair
 

SgtWookie

Joined Jul 17, 2007
22,221
I'm afraid that the LM2907 will also suffer from slow conversion; at 50Hz, a series of filters will be required to get a decent-looking output signal.
 

Thread Starter

Dyslexicbloke

Joined Sep 4, 2010
565
I have looked at the sheet for the PLL chip and I am sceptical that it will work at 50Hz, to be honest I was a little lost .....
Any ideas RE building from descrete componants or basic IC's?
Al
 

Thread Starter

Dyslexicbloke

Joined Sep 4, 2010
565
I hav found several circuit examples using an analough switch to apply voltage to a cap feeding a voltage follower.
These seem like a good way to go but I could do with a leg up un respect of timing and how to go about things.
I would need a sequence of events something like this.

with a square wave of between 10 and 60 Hz ......
Positive edge > start charging the cap, output should not change.
Negative edge > sample new value and change output to match.
Output latched > discharge cap to prime for next cycle.

Am, I correct in assuming that I would actually need 2 sample and hold stages, the first feeding the second, achieve the above.

Do you think that detecting 'current sample = output' would be a good way of determining when to switch to hold and discharge the cap.

The switch IC's I am using will be MC14016BCP.
The project is as much about learning a new type of componant as it is achieving the desired result.

Any and all comments welcome.
Thanks
Al
 
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