Here is my attempt to find fan-out for TTL inverter circuit.
As you can see, I did analysis for high input (low output) and used condition for saturation of output transistor Q3 to find max. number of gates which can be connected.
When input signal is low, output will be high, aprox. Vout = Vcc - Vd2 - Vbe4. Which condition should I use to find max. number of gates which can be connected in this case?
As you can see, I did analysis for high input (low output) and used condition for saturation of output transistor Q3 to find max. number of gates which can be connected.
When input signal is low, output will be high, aprox. Vout = Vcc - Vd2 - Vbe4. Which condition should I use to find max. number of gates which can be connected in this case?
Last edited: