2-The following circuit is a filtered rectifier.
a) - Consider the circuit without C1. Draw the voltage waveform at the rectifier entry point (transformer secondary) and voltage waveform at Rload (R1). Also draw D1 current waveform.

b) Consider now the C1 and find it's capacitance so that Vripple is no greater than 2V.

c) For the circuit of the previous problem (b), draw the input voltage, Rload voltage and diode current waveforms.

Consider that Vγ = 0.7V and mark all the key points in the graphic!

 

Well, That's how I have done the first question.

See attached pics. LTSpice matches my math.

 

hi Psy,
Say 230Vrms input to a 15:1 step down transformer, thats Vsecondary = 15.3Vrms secondary.

For secondary Vpeak thats 15.3 *1.414 = 21.68V - 0.7Vfwd = 20.98Vpeak.
Half wave rectified sinusoid, so no negative half cycle conduction.

E
BTW: The 1st part of the question does not ask for current.

 

hi Psy,
Say 230Vrms input to a 15:1 step down transformer, thats Vsecondary = 15.3Vrms secondary.

For secondary Vpeak thats 15.3 *1.414 = 21.68V - 0.7Vfwd = 20.98Vpeak.
Half wave rectified sinusoid, so no negative half cycle conduction.

E
BTW: The 1st part of the question does not ask for current.

Meaning that everything looks fine, right?

The blue curve is Vsec, so there is a negative half-cycle for that curve. The other 2 curves does not have negative hal-cycles!

 

For the 2nd one is simple:

Vripple < Iodc/(f*C) <=> 2 < 210/(200*C) <=> C not lower than 525μF also (kinda) confirmed by LTSpice. There are small diferences because I think LTSpice does not ignores D1 temperature and so the formula used is slightly different!

 

I just can't figure out the Id1 for the 3rd and last question when capacitor is considered to be in the cicuit!

 

hi Psy,
Reference the Id1 for the 3rd part, when C=525uF and Rload = 100R

You have the rectified Vpeak after the diode from part 1.
So the Id at the Vpeak will be Vpeak/RL, after the Vpeak the Vcap will decay exponentially until the next positive half cycle.
You choose the Cap to give 2V ripple, so its Vpeak down to Vpeak -2V.

Current will only flow in the diode while it is charging the Cap on the rising half cycle.
So it will look like a sinusoid pulse.

Eric.
Got my PC reworking at 19:00GMT,,, lots of hardware problems, replied to your PM.

 

Hi,

I would have to ask what kind of approximations are they allowing you to use, because the real rectified voltage wave with the cap in place will look like the top of a sinusoid at the wave front, then as the sinusoid peaks and starts to drop there will come a time when the slope of the sinusoid is more negative than the slope of the RC network and that is where the sinusoid ends and the RC exponential starts. If they allow a straight line approximation to the RC exponential, then it's just a straight line not an exponential. I ask this because the time constant of 525uf and 100 ohms is significant with respect to the sine quarter cycle period.