Hello:
I have a 3.3V 100 pulse-per-second signal coming from an FPGA. The signal is isolated and converted from 3.3V to 5V using a digital isolator.
The signal needs to be driven over a 50 ohm coaxial cable. The load impedance ranges from 50 ohms to 1 Mohm
Currently, I use a Philips (NXP) 74F3037 NAND Driver.
http://www.nxp.com/#/pip/pip=[pip=74F3037_2]|pp=[t=pip,i=74F3037_2]
The chip has 4 outputs, 2 of which I parallel together for increased drive strength. The other 2 are NC. The output resistors on the 2 outputs are 100 ohms (50 ohms parallel). See the attached PDF for details.
What I plan on trying is:
1/ Reducing the output impedance. I currently find the response is over-damped.
2/ Connecting more outputs together. Perhaps there isnt enough drive strength?
Previously the rise-time was not critical, but now, for measurement purposes ONLY (1m coax into a scope) - a fast rise-time is required.
In the previous design a gate-driver was used and I followed the same concept in this design. I assume the previous designer (no longer around) used a gate driver because the original rise time requirement was better than 1 us and, as I mentioned, the signal is only 100PPS.
Ive done some reading and I typically see current-mode opamps are used for high performance; however, I dont have much experience in that area which is why I followed suit with the previous design and stuck with a gate-driver.
Does anyone have any suggestions for this design?
Appreciated,
Gavin
I have a 3.3V 100 pulse-per-second signal coming from an FPGA. The signal is isolated and converted from 3.3V to 5V using a digital isolator.
The signal needs to be driven over a 50 ohm coaxial cable. The load impedance ranges from 50 ohms to 1 Mohm
Currently, I use a Philips (NXP) 74F3037 NAND Driver.
http://www.nxp.com/#/pip/pip=[pip=74F3037_2]|pp=[t=pip,i=74F3037_2]
The chip has 4 outputs, 2 of which I parallel together for increased drive strength. The other 2 are NC. The output resistors on the 2 outputs are 100 ohms (50 ohms parallel). See the attached PDF for details.
What I plan on trying is:
1/ Reducing the output impedance. I currently find the response is over-damped.
2/ Connecting more outputs together. Perhaps there isnt enough drive strength?
Previously the rise-time was not critical, but now, for measurement purposes ONLY (1m coax into a scope) - a fast rise-time is required.
In the previous design a gate-driver was used and I followed the same concept in this design. I assume the previous designer (no longer around) used a gate driver because the original rise time requirement was better than 1 us and, as I mentioned, the signal is only 100PPS.
Ive done some reading and I typically see current-mode opamps are used for high performance; however, I dont have much experience in that area which is why I followed suit with the previous design and stuck with a gate-driver.
Does anyone have any suggestions for this design?
Appreciated,
Gavin
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