Divide by 2 flipflop with 3 NAND gates?

Thread Starter

THE_RB

Joined Feb 11, 2008
5,438
Hi, I need a divide by 2 "flip flop" logic device, and rather than add an entire new flip flop IC to the design I have 3 spare NAND gates.

Does anyone know if it is possible to make a divide by 2 type flip flop using just the 3 NAND gates?

The input is a logic level 0v-5v square wave with a duty of 40-60%, somewhere around 10kHz and I need an output at half the frequency and 50% duty cycle. It doesn't matter if it triggers from the / edge or the \ edge of the input signal, as long as it divides by 2 and gets exactly 50% duty.

I have made S/R flip flops from NAND gates, which just takes 2 gates, so maybe it's possible to add another NAND gate and make it a toggle type (divide by 2) flip flop? I've been working with PICs for so many years that I'm rusty on the fine details of working with discrete logic gates, I think the last time I tried to make something complex out of gates was in the late 70's. :eek:

Thank you. :)
 

Wendy

Joined Mar 24, 2008
22,141
Any other logic at all? I cut my teeth on Master/Slave FF, it might be possible to do something with diode steering.
 

holnis

Joined Nov 25, 2011
49
I think it's possible with using just 3 NAND gates, Take a look to the link given on the post #3, From there on the diagram of the D- flip-flop we can Conclude this equation:

C= Clock
D= Data
Q= Output

Q(t+1) = ((DC)' + (Q + (D'C)' )' )'

After Simplification:


Q(t+1) = ((DCQ)' . ( DC (D + C') )' )'

Q(t+1) = ((DCQ)' . (DC)' )'

So I think it's possible With just 3 NAND, one of them would need to have three inputs.

Maybe I'm wrong! :p
 

SgtWookie

Joined Jul 17, 2007
22,210
I think it's possible with using just 3 NAND gates, Take a look to the link given on the post #3, From there on the diagram of the D- flip-flop <snip>
Unfortunately, that D-type FF schematic in that link isn't correct. If Q\ is connected to D, and then CP goes high, the circuit will oscillate at high frequency.

As crutschow mentioned, it needs to be edge-triggered, and that takes more gates.
 

Thread Starter

THE_RB

Joined Feb 11, 2008
5,438
Thank you Crutschow for the great link on flip-flops! Ok so I don't feel so bad now that my couple of quick attempts to make a /2 circuit out of 3 NAND gates didn't work. ;)

The circuit has three 2-input NAND gates spare. They are schmidt trigger input type. The other NAND gate is used as an oscillator, and the desired result from the one chip is to get a rough frequency output but at exactly 50% duty (hence the /2 idea).

I don't want to add other chips but maybe it can be done with a couple of extra discretes? Since the oscillator is a fixed freq (say +/-10% freq accuracy) it might be possible to use an RC timed circuit on the output to cause the /2 toggling?

I also considered using a dual flipflop IC with one FF being the oscillator and the other FF as the /2, but I could not find an easy source for a FF with a schmidt trigger input as the oscillator needs to be fairly reliable so a schmidt input is desired.

If it starts getting too parts-heavy I can always use a $1 PIC, but I prefer if possible to use a 15 cent quad NAND gate. Any suggestions appreciated. :)
 

SgtWookie

Joined Jul 17, 2007
22,210
Just something to consider - a single D-type flip-flop in a small, smaller, or really small 8-terminal package:
http://www.ti.com/lit/ds/symlink/sn74lvc2g74.pdf

As far as adding discretes to make the left-over three NANDs into a D-type - I think it would be a lot easier to use a couple of transistors to build an astable multivibrator, and feed that output through one of the above single flip-flops.
 

djsfantasi

Joined Apr 11, 2010
6,421
Just for my own edification and education, let's stretch the original requirements and assume we have four NAND gates to make a divide by two counter. Does the implementation of a D-type latch configured as shown accomplish the task? Why or why not? I can't find my LTSpice as I went to a new machine...
 

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crutschow

Joined Mar 14, 2008
24,946
Just for my own edification and education, let's stretch the original requirements and assume we have four NAND gates to make a divide by two counter. Does the implementation of a D-type latch configured as shown accomplish the task? Why or why not? I can't find my LTSpice as I went to a new machine...
Since that circuit is not edge triggered, it works (if at all) only if the clock pulse width is shorter than the propagation delay through the circuit. Otherwise, when the clock is high, the circuit will oscillate because of feedback from the output to the input.

That's why master-slave FFs were invented.
 

praondevou

Joined Jul 9, 2011
2,942
That question was bothering me, but no, there is no simple solution (if any) with 3 NAND gates. Every other added component would also increase the price...

How about a CD4047, it has an oscillator output and a divide-by-2 output with supposedly guaranteed 50% duty cycle?

Then there is also the MIC1555. A bit more expensive though.

Maybe you should go with the PIC or single inverter and D-flipflop packages. Also more expensive.. :-/
 

Thread Starter

THE_RB

Joined Feb 11, 2008
5,438
SgtWookie, thanks for the suggestion of the tiny logic parts, I knew of them but had missed that option for this project. :)

[QUOTE = praondevou]...
How about a CD4047, it has an oscillator output and a divide-by-2 output with supposedly guaranteed 50% duty cycle?
...[/quote]

Hmm, that 4047 sounds like a perfect solution! :D

It only needs one external resistor+cap and has inbuilt /2 flipflop on the output, and even has Q and -Q outputs.

Thank you very much, provided I can source it cheap enough the 4047 looks like the perfect tool for the job!

Thank you too everyone else for all the help. :)
 
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