Divide 1MHz into 1/60Hz

Thread Starter

Salgat

Joined Dec 23, 2006
221
For our class project we are building digital clocks using 74series and CMOS ICs. As of now I have just built the 1MHz frequency generator, and am trying to figure out how to convert the 1MHz frequency into 1/60Hz(for the minutes digit). I know that I can use decade counters to get down to 1Hz or even lower, but how do I get it down to precisely 1/60Hz?
 

Papabravo

Joined Feb 24, 2006
13,522
In one second there are 1e6 cycles and in one minute there are 60 seconds. So if you divide the 1 MHz. clock by 60e6 you should get your one minute pulse which is the frequency 1/60 Hz.

The prime factors of 60e6 will give you a clue as to the configuration of dividers that you need.

60e6 = 2 * 3 * ((5 * 2) ^ 6) = (2^7) * 3 * (5^6)

Since multiplication is commutative you can apply these stages in any order that you find convenient.
 

Thread Starter

Salgat

Joined Dec 23, 2006
221
Which IC can devide a frequency by 3? I know that two JKs properly wired can also divide a frequency by 3, but is there a chip that is also designed for that purpose?

Also thanks a ton for the help finding what to divide by, did not know you could divide by 3. I will use 7 decade counters, 1 divide-by-3 and 1 JK. Should these be CMOS or will TTL handle the higher frequencys?
 

Papabravo

Joined Feb 24, 2006
13,522
CMOS parts, even the old 4000 series parts, will handle 1 MHz. just fine. A 4-bit syncronous counter with a preload value can be configured for any divisor that you like. A divide by three would use a preload value of 13, so that the counter will go 13, 14, 15 and the Terminal Count output will be used to preload the counter on the next clock. It is also a good idea to decode any illegal states and force the counter to a known good state.

You can use either the LSB which is low for one period out of three or the next bit which will be high for one period out of three.
 

Thread Starter

Salgat

Joined Dec 23, 2006
221
Just a follow up, I ended up using 4 74390s and had the output frequency come from QD. I then hooked it up to a 7490 and had the resets to 0 tied to the ANDed QB and QC from the same 7490. The output frequency was the output of the AND gate.
 

Ron H

Joined Apr 14, 2005
7,014
In one second there are 1e6 cycles and in one minute there are 60 seconds. So if you divide the 1 MHz. clock by 60e6 you should get your one minute pulse which is the frequency 1/60 Hz.

The prime factors of 60e6 will give you a clue as to the configuration of dividers that you need.

60e6 = 2 * 3 * ((5 * 2) ^ 6) = (2^7) * 3 * (5^6)

Since multiplication is commutative you can apply these stages in any order that you find convenient.
Minor nitpick, Papabravo: You slipped a decimal point.

60e6 = 2 * 3 * ((5 * 2) ^ 7) = (2^8) * 3 * (5^7)

Gotta keep you honest. ;)
 

thingmaker3

Joined May 16, 2005
5,084
PapaBravo is honest. (He's crotchety as all getout, but he's always honest.)

5*2=10. 10=10^1.


Salgat, try an internet search on "divide by n counter." You can make one from a 74161, as well as a few other chips. Some programmable ones are also available.
 

Thread Starter

Salgat

Joined Dec 23, 2006
221
All I cared about was the falling edge of the square wave, so I was able to just use a decade counter(7490) that would reset once it hit 6(thus it would pulse almost instaneously after 5 and reset). So far the clock is working great.
 
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