# Discrete op amp: shifting output

Discussion in 'The Projects Forum' started by Chozo, Jul 13, 2011.

1. ### Chozo Thread Starter New Member

Jun 9, 2011
3
0
I'm building a discrete op amp for a school project. There are a number of requirements for the circuit, but the immediately relevant ones are:

1. 3dB frequency response from DC-15MHz

2. Output range +/- 10V

3. gain of 1000-1500 (open loop)

Our professor has heavily implied that he's not necessarily expecting us to completely meet spec (e.g. lengthy in class discussions about the "good, fast, cheap, pick two" principle). However, I figure it's easier to ask for forgiveness than permission only if you can eliminate the more egregious errors in the circuit, like the one I'm having right now.

This is what I have right now, with a gain of ~1050 and meeting the frequency response requirements:

http://i51.tinypic.com/2wn1t1h.jpg

At low input voltages, the circuit seems to play relatively nice. These are the waveforms produced at an input of 0.001 V and 10Hz:

http://i56.tinypic.com/23phki.jpg

(blue is the output directly after the differential amplifier stage, while green is the output at the 50k load)

As the input voltage increases though, the output waveform shifts down, dramatically so. Here's the output at 0.007 V and 10Hz:

http://i52.tinypic.com/24zaio5.jpg

Comparing the peak-to-peak voltage of the output, the gain is still around 1050: however, the output seems to be centered around about -1.6V.

Circuit design has never been my strong point, so I'm stumped as to why the output is behaving this way. What am I not accounting for that's causing the output to shift as the input voltage rises?

2. ### #12 Expert

Nov 30, 2010
17,835
9,166
Try operating it like an opamp...give it a feedback loop.

3. ### Chozo Thread Starter New Member

Jun 9, 2011
3
0
I tested a couple feedback setups. The problem still persists at higher gains/inputs, which makes me think that it's a problem inherent in the circuit itself.

Also, our professor hasn't given us any indication of the test requirements for the circuit, but since most of the relevant parameters are for an open loop configuration I expect that's the conditions he'll expect the circuit to be tested under.

4. ### hgmjr Moderator

Jan 28, 2005
9,030
215
It sounds like your current mirror is non-ideal. Try replacing it with a Wilson Current Mirror as shown below. You will need to translate it to a PNP version to suit your design.

hgmjr

5. ### #12 Expert

Nov 30, 2010
17,835
9,166
You're right. The problem is inherent in the design. Q6 and Q9 aren't wired up to produce 0 volts at the output with zero volts in. Discrete current mirrors don't track anywhere near as well as "on chip" current mirrors. Ground both inputs and measure the voltage at collectors Q6 and Q9 to see if your current mirror is tracking...or is this all "simulated"?

The Q32 and Q35 circuits are so dependent on gain and temperature, and there is no DC feedback anywhere. I can't see why it WOULd center the output.

6. ### Chozo Thread Starter New Member

Jun 9, 2011
3
0
So, I took hgmjr's adviced and replaced the current mirror with a four-transistor Wilson current mirror.

The updated circuit:

http://i51.tinypic.com/20zuqgm.jpg

Right now, my primary concern is that the output immediately at the differential amplifier is centered too high.

I don't need the differential amplifier output to be centered on 0V, but I do need enough for it to produce a clean waveform: since the highest practical input I'm going to encounter is 0.01V and the gain of the diff. amp stage is about 50, I need about 1V peak-to-peak worth of breathing room. In this case, this means that the diff. amp output needs to be centered at about 8.7-8.8V. As is, it's centered at about 9.2V and it's causing outputs like this (input=0.001V):

Needless to say, when this is amplified again the waveform doesn't come out right.

What are my options in terms of shifting the differential output downwards, or am I just up the creek on this one?