i have project in my logic circuit, these were the asynchronous using basic logic gates (74ls04,74ls08,74ls11,74ls21,74ls32) and timer circuit using ne555 ic. please help me to create the schematics and if possible, solve also the karnaugh map and the boolean simplification.



guys, it uses two dual seven segments for the display and one triple seven segment for the addition result in the asynchronous.
guys, it uses two dual seven segments for the display and one triple seven segment for the addition result in the asynchronous.
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