# Digital Combination logic

Discussion in 'Homework Help' started by luigihs, Jan 28, 2013.

1. ### luigihs Thread Starter New Member

Oct 10, 2012
12
0
Hello,
Im stuck in this I dont know how to do I believe I need to to do truth table but Im not sure how to do truth table Im really begginer as you can see in the problem that Im trying to do in here:

I need to get the elementary logic gate equivalent in this circuits .

What I know is AND gate so it should be
0 0 0
0 1 1
1 0 0
1 1 1

and the last one is
NOT
0 1
1 0

Thanks a lot!

2. ### tshuck Well-Known Member

Oct 18, 2012
3,527
679
The first thing you should do is draw labels on your inputs and outputs, a & b are typical for your inputs, and z is typical of outputs.

So, write the Boolean expression for your inputs after the first gate, then operate on that Boolean expression with the next gate. Your truth table has 2 inputs, so you have 4 options to decide what happens to the output through the use of your truth-table.

Basically, the truth-table gives you the output, given the input, so, for the AND gate, you've shown that the output is 1 iff both inputs are 1

you should always label the signals describe by the truth-table:
AND gate:
 a b z 0 0 0 0 1 0 1 0 0 1 1 1

Aug 23, 2012
6,459
1,001
AND gate

B A C(Vo)
0 0 0
0 1 0
1 0 0
1 1 1

Inveter:

I O
-----
0 1
1 0

NAND Gate:
B A C(Vo)
0 0 1
0 1 1
1 0 1
1 1 0

4. ### tshuck Well-Known Member

Oct 18, 2012
3,527
679
I thought this was Homework Help, no?

5. ### luigihs Thread Starter New Member

Oct 10, 2012
12
0
sorry what is z ? the output of AND?

6. ### tshuck Well-Known Member

Oct 18, 2012
3,527
679
Yes, like I said, outputs are usually denoted by the end of the alphabet, where inputs are usually the beginning of the alphabet, this is, of course, not required, but is understood by most...

Though, some people try to avoid z since it is also used to denote a tri-stated output state, but don't worry about that just yet

7. ### luigihs Thread Starter New Member

Oct 10, 2012
12
0
Ok I think Understand the first bit now I have this one but is having two NOT (Inverter)

When I have two can I do this?
Z A Z
0 0 0
1 0 0
0 1 0
0 1 0

8. ### tshuck Well-Known Member

Oct 18, 2012
3,527
679
Not quite, you have not labelled your inputs and outputs, so I'll assume the two to the left are inputs and the last column is the output.

You've covered one of the states twice, " 0 1". A truth table must cover all possible inputcombinations. Try using this table and fill it in:
 a b z 0 0 0 1 1 0 1 1

where a and b are the inputs to your inverters....

9. ### luigihs Thread Starter New Member

Oct 10, 2012
12
0
 a b z 0 0 1 0 1 0 1 0 1 1 1 0

10. ### tshuck Well-Known Member

Oct 18, 2012
3,527
679
Not quite, look at it as an AND gate and start with the truth table for that.

 a b z 0 0 0 0 1 0 1 0 0 1 1 1

So, the output is only 1 when both inputs to the gate are 1.

If we were to invert the inputs, We'd get the inputs for the AND gate specified as:
 a' b' z 1 1 1 0 0 1 0 0

Take a look at this:

It should clarify this a little...

File size:
8.3 KB
Views:
42
11. ### ScottWang Moderator

Aug 23, 2012
6,459
1,001
That was totally very basic logical theory, it's easy to find it on internet, so that's nothing special, when you talking about logic then you will talk about it.

12. ### tshuck Well-Known Member

Oct 18, 2012
3,527
679
Yes, but that does not help learn how to approach the problem. Learning is not a series of, "Here's the answer", it's about learning how to approach a problem in a way that you can apply to more general problems. So that any problem becomes doable, without resorting to a predetermined answer.

13. ### luigihs Thread Starter New Member

Oct 10, 2012
12
0
Hi sorry so the Z (output) is and for a and b
0
0
0
1

14. ### tshuck Well-Known Member

Oct 18, 2012
3,527
679
Hmmm... perhaps a different approach is in order... a' and b' are given as inverted a and b, the inputs to the system, and the output of teh AND gate is the system output. We know that an AND outputs 1 only when both of its inputs are 1, so when a and b are 1, they are inverted, by the inverters(we get a' and b') so both inputs to the AND gate are 0(a' = 0 and b' = 0), making the output, due to the function created by the AND gate, 0.

Now, following that reasoning, finish the truth table...

Oct 10, 2012
12
0
1
0
0
0

like that?

16. ### tshuck Well-Known Member

Oct 18, 2012
3,527
679
As long as that is the output and the input is the same format as it has been, then yes!
You should always format your truth tables like this:
 a b z(output) 0 0 1 0 1 0 1 0 0 1 1 0

or at least like this:
a | b | z(output)
0 | 0 | 1
0 | 1 | 0
1 | 0 | 0
1 | 1 | 0
This way, there's no way to confuse your signals. If you didn't have both inputs doing the same thing, you'd be in real trouble. Get into this habit now...

Also, does this truth table look like any fundamental logic gates to you?

Mar 31, 2012
23,391
7,099

Aug 23, 2012
6,459
1,001
19. ### ScottWang Moderator

Aug 23, 2012
6,459
1,001
What I want to say is that if there are so much answers already there, then it's unnecessary to talk too much, we just lead him to the answers as WBahn linked, when the learner has some problems from the answers then we just solve those problems, I think that is more easier.

20. ### luigihs Thread Starter New Member

Oct 10, 2012
12
0
Thanks is a nor