# differential amplifier project

#### boby4u

Joined Jun 1, 2007
26
Hi
I have a question about differential amplifier.
Ive designed a differential ampli with two pnp transistors
those are bc807-40 .I had never worked with a pnp tran before.
the question is getting the most possibe gain from the circuit.
as you see in te pictures I have connected a current mirror as
a current source under the tho emitters.
I have two Rc with the value of 21 k.and because my current mirror is giving me
1.221 mili Am those Rc were the highest I could put there not allowing
the transistors to go to saturation.
Was my design correct or you see problems in that?
do you have any Idea to make the gain higher?
the schematic of my circuit is below:
I look forward to your guidance.
thankyouthankyouthankyouthank.

#### hgmjr

Joined Jan 28, 2005
9,029
I would have thought you needed to use a PNP constant current source and reference its base bias to the ground rail and its emitter via the emitter resistor to the ground power rail rather than using an NPN as you schematic indicates.

You may want to try reconfiguring the circuit with this in mind and see what gain you can obtain from your simulation.

hgmjr

#### hgmjr

Joined Jan 28, 2005
9,029
This is what I had in mind.

The 15V power source is a negative voltage. The plus sign is an artifact of my image capture process. Sorry if it is a slight bit confusing.

hgmjr

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#### boby4u

Joined Jun 1, 2007
26
But I wanted the current mirror only for giving
current to my transistors.
the current mirror is giving me 1 mA and is constant.althought both of the ways are true.
now I have a problem in calculating maximum swing of output voltage.
imagine that we did not have any value for Rc. I want to understand how to find Rc
according to the max swing of Vo ???
Idont khow how to calculate max swing of Vo??

#### hgmjr

Joined Jan 28, 2005
9,029
But I wanted the current mirror only for giving
current to my transistors.
the current mirror is giving me 1 mA and is constant.althought both of the ways are true.
now I have a problem in calculating maximum swing of output voltage.
imagine that we did not have any value for Rc. I want to understand how to find Rc
according to the max swing of Vo ???
Idont khow how to calculate max swing of Vo??
By the phrase "calculate max swing", are you interested with finding the maximum useable headroom for the amplifier or are you interested in computing the gain of the amplifier (Vout/Vin)?

hgmjr

#### boby4u

Joined Jun 1, 2007
26
the question is finding the max swing of Vo.
then by means of that finding Rc
after that finding gain(Vo/Vin)

#### Ron H

Joined Apr 14, 2005
7,014
I think hgmgr's point was that you can't use an NPN current source. You have created a monster whose differential pair is accidentally biased in the active region. See the annotated schematic below.
You need a PNP current source, as hgmjr pointed out.

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#### boby4u

Joined Jun 1, 2007
26
thanks for your help hgjmr & RON H.
YEAH AS YOU SAID MY FIRST circuit was really accidentally giving me
the current needed. my npn was in saturation that is not accepted
in a current source.
I changed it to a pnp one but the design that hgjmr gave me for current
source was giving me only pico ampers. so I changed it like this.
I put the 15v dc source behind the emitter to bias my current source.
Now I am giving 2 mA whicht I needed .thanks to both of you.
here is the new scheme . the two upper transistors does not seem to be on
saturation but my Vout is cutted (up & down). whatever I PUT in Rc place
did not effect what do you advise me to do right now.

#### boby4u

Joined Jun 1, 2007
26
If I bring the V(in) lower to 0.1v then Vo is not cut.
but I dont really know wether there is a spechial rule about putting Rc
here is what my friend told me about it:
[Vcc+V(sat)-V(BEon)]/2=MAX SWING OF vO
THEN MAX SWING=Rc*Ic
what do you think about that?

#### hgmjr

Joined Jan 28, 2005
9,029
By the term "cutted" I assume you mean "clipped" at the top and bottom of the waveform.

That is most often a sign that you have more gain than you need for the signal level being applied at the input.

I also notice that you are now using a dual supply scheme with +15V and -15V. That should give you the potential for a greater output voltage swing. Your very first schematic only had a single 15V supply I believe.

Since your input signal is DC coupled and referenced to ground, the signal swing on the collectors is going to be limited in how far it can go in the negative direction to around +0.7 volts due to saturation. I think this is what you have already observed.

If you can ac couple your input signal then you could bias you differential transistor pair to a more positive voltage so that you could take greater advantage of the available power supply range.

hgmjr

#### boby4u

Joined Jun 1, 2007
26
By the term "cutted" I assume you mean "clipped" at the top and bottom of the waveform.

That is most often a sign that you have more gain than you need for the signal level being applied at the input.

I also notice that you are now using a dual supply scheme with +15V and -15V. That should give you the potential for a greater output voltage swing. Your very first schematic only had a single 15V supply I believe.

Since your input signal is DC coupled and referenced to ground, the signal swing on the collectors is going to be limited in how far it can go in the negative direction to around -0.7 volts due to saturation. I think this is what you have already observed.

If you can ac couple your input signal then you could bias you differential transistor pair to a more negative voltage so that you could take greater advantage of the available power supply range.

hgmjr

#### Ron H

Joined Apr 14, 2005
7,014
You don't need 40mA through your current source bias diodes. That's a huge waste of current.

#### boby4u

Joined Jun 1, 2007
26
what should I to instead of that .
I think putting another transistor beside Q4 will work.
when the base & collector are connected to each other.
I will go through that.

#### Ron H

Joined Apr 14, 2005
7,014
what should I to instead of that .
I think putting another transistor beside Q4 will work.
when the base & collector are connected to each other.
I will go through that.
There are many ways of making current sources. Below are three possibilities.

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#### hgmjr

Joined Jan 28, 2005
9,029
Ron H,

Would you deem it appropriate to include a fourth current source possibility; that of the classic "current mirror"?

hgmjr

#### Ron H

Joined Apr 14, 2005
7,014
Ron H,

Would you deem it appropriate to include a fourth current source possibility; that of the classic "current mirror"?

hgmjr
Sure, that is another possibility. A current mirror using discrete, unmatched transistors requires "ballast" resistors in order to get predictable results, and if you use a 1:1 mirror, the bias current has to equal the output current (of course, that is nearly the case in the 2 diode bias network I posted, although it was not necessary). In ICs, ratioed mirrors are possible by scaling transistor sizes. In discrete circuits, it gets a little messy.
I like current sources with operational feedback, but it's probably overkill in this situation. The current is more predictable, but the diff amp gain will still change with temperature.

#### hgmjr

Joined Jan 28, 2005
9,029
Sure, that is another possibility. A current mirror using discrete, unmatched transistors requires "ballast" resistors in order to get predictable results.....
Actually what I had in mind was the use of one those dual-transistor IC's containing matched transistors. Transistor matching is probably not such a problem in simulation since the use of the same model for both devices provides a matched scenerio. That is one of the pitfalls of simulation. Real world circuits tend to bring their own set of variables that are often missing from the simulated version.

Upon reflection the use of an dual-transistor IC may violate the premise of keeping it simple by basing the design on discrete transistors.

Oh well, just a thought.

hgmjr

#### Ron H

Joined Apr 14, 2005
7,014
Actually what I had in mind was the use of one those dual-transistor IC's containing matched transistors. Transistor matching is probably not such a problem in simulation since the use of the same model for both devices provides a matched scenerio. That is one of the pitfalls of simulation. Real world circuits tend to bring their own set of variables that are often missing from the simulated version.

Upon reflection the use of an dual-transistor IC may violate the premise of keeping it simple by basing the design on discrete transistors.

Oh well, just a thought.

hgmjr
I had temporarly forgotten about matched-transistor ICs. What you say about simulation is very true. It is possible to see the effects of mismatching by adding the parameter m to a semiconductor. In LTSpice, you do it by editing the transistor's part number. For example, you would right-click on the part number, and change it from "2N3906" to "2N3906 m=1.1", or whatever. M is the size-multiplication factor (in this case, the area of the B-E junction is what matters most).