# Device for Down-Converting Frequency (Subharmonics)

Discussion in 'General Electronics Chat' started by moot, Mar 7, 2012.

1. ### moot Thread Starter Member

Sep 20, 2009
46
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I have a 200 MHz VCO. I would like to convert some of this VCO's output to a 10 MHz sinusoidal signal that is in phase with the original 200 MHz signal.

What device would be appropriate for this application?

2. ### Brownout Well-Known Member

Jan 10, 2012
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999
You can just use a divide by 20 counter.

3. ### moot Thread Starter Member

Sep 20, 2009
46
1
Will this produce a sinusoidal output, or a square wave (and/or TTL) output? A quick Google search turns up stuff that would output a square wave. It is extremely important that my final signal be a very pure 10 MHz sine wave. I could use a narrow bandpass filter on the output of a divide by 20 counter, but I'm not it would do the trick. (Edit: Also, I'm not positive, but I think using a bandpass filter could add a signficant phase shift to the output... this is something I can look up, though.)

4. ### MrChips Moderator

Oct 2, 2009
14,695
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You need a mixer and a reference oscillator at 190MHz or 210MHz.
When you mix (multiply) the two signals you will get sum and difference frequencies. Feed this into a low pass filter to accept the difference frequency of 10MHz and reject the higher frequencies.

5. ### Ron H AAC Fanatic!

Apr 14, 2005
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I think this needs to be done with a PLL. I don't see how you can maintain any frequency coherence with a mixer, let alone phase coherence.
A PLL can provide phase stability, but I think maintaining zero phase difference (every 20 cycles) between the 200MHz and the 10MHz is problematic.
Maybe there are techniques that I an not aware of.

6. ### Brownout Well-Known Member

Jan 10, 2012
2,374
999
The output can be anything you want. You can hi-pass filter it for make a sinewave, or you can use a wave shaper. A PLL can shift the phase to make up for any lag due to filtering. In fact, some PLL's include the pre-scaler and post-scaler ( which are nothing more than the counter I mentioned ) as an integrated function.

7. ### Ron H AAC Fanatic!

Apr 14, 2005
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There will be phase shift in the frequency divider that is difficult to compensate for.

8. ### Brownout Well-Known Member

Jan 10, 2012
2,374
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Well, you can always synchronize the output of the divider with the input signal. The phase shift in that case will be one propagation delay.

9. ### Ron H AAC Fanatic!

Apr 14, 2005
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Sure, but 200MHz is a 5nS period. Even if you use an ECL divider, the propagation delay is a significant portion of the period.

10. ### Brownout Well-Known Member

Jan 10, 2012
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Modern configurable devices have propagation delays in the 100's of pS. There are routing delays, but they can be matched for the driving and derived signals. This may be the only route to achieve a reasonable solution. If not, then I'm out of ideas.

11. ### moot Thread Starter Member

Sep 20, 2009
46
1

After further thought, I've realized that my plan for how to implement this won't work. (Some background: The goal is to drive an acousto-optic device at two closely spaced frequencies near 200 MHz. The rf signals must be phase coherent. I have a closed box rf driver (150 MHz-250 MHz) whose amplitude and frequency are voltage tuned. I was hoping to find a way to purchase just a single connectorized device that I could string up with a 20 MHz function generator to 100% amplitude modulate the rf driver output in a phase coherent way. The fn gen's clock could be set with a 10 MHz pulse. My original idea would result in a feedback loop that would cause the fn gen's clock to lose the lock.)

Now I think I'll just place a big order with Mini-Circuits and construct a PLL tailored to this application. It won't be too much trouble, and it might be good experience.

Could you give some advice on the following plan?

1. Phase-lock a 200 MHz VCO to a 1-10 MHz sine wave.
2. Mix both waves to get a 200 MHz output (amplitude) modulated 100% at 1-10 MHz.
3. Amplify to 1.5 W to drive the AOM.
I'm working off a document here and your earlier comments. I've replaced some of the components with ones that would work for this frequency range (notably, the ADE-1, JTOS-300, and ADP-2-1).

A block-diagram of the circuit is attached.

I don't know much about PLL's, so I'm confused about a few things. The "phase detector" here is a mixer. When you mix (multiply) two sine waves, you get sine waves at the sum and difference frequencies. I assume the RC low-pass filter is supposed to remove the higher of the two. What does the "loop filter" do? I would think a TLO82 would just amplify the signal. Perhaps this design is only meant for locking two of the same frequencies together (in this case, 50 MHz). Any help or a point in the right direction would be very much appreciated.

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12. ### moot Thread Starter Member

Sep 20, 2009
46
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(Note: Sorry for the double post, I've learned a thing or two since the last post. Also, is there a way to do inline TeX?)

Instead of the idea above, I'm now thinking I should just lock a 210 MHz signal to my stable 200 MHz signal. Sounds like a PLL would be necessary.

So my understanding of a PLL (hat-tip SNOA651) is that you have a reference signal,

$V_{1}(t) = V_{1} \cos \left[ \omega_{0} t \right]$,
and a VCO signal,

$V_{2}(t) = V_{2} \cos \left[ \omega_{0} t + \theta (t) \right]$.
When they are mixed (multiplied) you get

$V_{12}(t) = \frac{1}{2} V_{1}V_{2} \left{ \cos \left[ 2 \omega_{0} t + \theta (t) \right] + \cos \left[ \theta (t) \right] \right}$.
After low-pass filtering, you get something that depends only on the instantaneous phase

$V^{lo}_{12}(t) = \frac{1}{2} V_{1}V_{2} \cos \left[ \theta (t) \right]$.
This is the error signal sent to the VCO. The VCO responds by changing $\theta (t)$ according to

$\dot{\theta} (t) = K_{0} V^{lo}_{12}(t)$,
so the resulting phase of the VCO is set to

$\theta (t) = K_{0} \int V^{lo}_{12}(t) dt + C$
where C is an integration constant.

That all makes sense. But what if you don't want the VCO frequency to be exactly the reference frequency? What if you want them to differ by some set amount, like 10 MHz?

Questions:

1. It seems to me that the only way to do it is to use a synthesizer. (First of all, this looks like exactly the same thing as a "divide-by-n-counter" suggested by Brownout. Is that right?)
2. If it's true that you'd have to use a synthesizer, wouldn't the resulting stability of output depend on the stability of they synthesizer? Not being familiar with these devices at all, are synthesizers significantly more stable than VCO's?
3. There seem to be a ton of synthesizers on the market. What key words would be useful to know if I were to search for a synthesizer that takes a sine wave and outputs a sine wave?
4. Any manufacturers you'd recommend for the 200 MHz range?
Being a bit of an outsider, finding the right tool for this application is a daunting task without a little guidance. I really appreciate any help.

13. ### Ron H AAC Fanatic!

Apr 14, 2005
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The two inputs to my phase detector would be oscillator 200MHz/20=10MHz, and VCO 210MHz/21=10MHz.

14. ### moot Thread Starter Member

Sep 20, 2009
46
1
Thanks for the reply. So you would recommend doing the phase detection at lower frequency. I imagine phase detectors in general do a better job at lower frequencies, so that makes sense.

It would be nice to be able to tune the difference between the two oscillators and have them remain locked. For instance, if I wanted to tune the VCO from 210 MHz to 205 MHz, I would need to synchronously tune the divide-by-n counter from n = 21 to n = 20.5. I wonder if there is a way around that.

15. ### Ron H AAC Fanatic!

Apr 14, 2005
7,049
663
In a simple PLL (which is the only kind I am familiar with), the two phase detector inputs must be at the same frequency (it is a phase detector, after all). You find the highest common factor of the two frequencies, divide each by that factor, and those are your two divisors. In the case of 200 and 205, the HCF is 5, so your divisors are 40 and 41.
You might e better off with DDS, as you said earlier.