Designing a voltage amplifier

Discussion in 'Homework Help' started by alphacat, Mar 12, 2010.

  1. alphacat

    Thread Starter Active Member

    Jun 6, 2009
    I need to design a voltage amplifier and I just dont know how to start.
    I got the following requirements:
    Av = 20 (with no load).
    Rin > 10KΩ
    VC = 0VDC (collector voltage).

    Could you please guide me through this?

    * Please notice that there is a split power supply here (-5V, +5V).

    I wrote the following equations.
    * Av,int = gm / (1 + gm * RE) * RC = 20
    * Rin = (R1 || R2) || [ (βo / gm) * (1 + gm * RE) ] = 100KΩ
    * gm = IC / Vth
    * IC = VCC / RC
    * VB = VBE + (IC / αF) * RE ≈ VBE + IC * RE
    Last edited: Mar 13, 2010
  2. k7elp60

    AAC Fanatic!

    Nov 4, 2008
    I have one problem with your requirements, that of the VC=0
    I am assuming the the amplifier is to be class A. If so I usually bias the transistor to that the collector voltage is very close to 1/2 Vcc with no signal.
    The gain of a typical class A stage is the collector resistor/un bypassed emitter resistor.
    Also the the input impedance of your circuit is very close to the parallel combination of R1 and R2.
    If you use collector resistor of 10K, the IC for center biased would be 2.5/10k or 100μA. The emitter resistor then would be 10K/20 or 500
    The closest stand value would be 510Ω.
    I normally calculate the current thru the base bias resistor= 10X the base current. The base current in this situation would be IE/β. The emitter current is very close to the collector current. Look up the specs of the 2N2222 to see what the is for 100μA of collector current. The continue with your calculations.
    alphacat likes this.
  3. hgmjr

    Retired Moderator

    Jan 28, 2005
    When using an emitter resistor the closest that Vc can get to ground is:

    \LARGE V_c\;=\;\frac{V_{cc}*R_e}{R_c+R_e}\;+\;V_{ce(sat)}

  4. hobbyist

    AAC Fanatic!

    Aug 10, 2008
    VC @ 0 volts
    split power supply.

    I don't like split power supplies, I have a hard time figuring the voltages.
    Throws me off so much.

    For me it's easier to calculate using a ground and one supply voltage.

    How to start this design is your question.

    First gather all constraints. (requirements)

    a). you are given a split supply of 5v. each.
    This is very important these nomenclatures will be used in later calculations.
    The +5v. is called VCC...........The -5v. is called VEE......
    b). your given a load of 10K
    c). your given a Av.=20 , NO load
    d). Rin>10K
    e). VC @ 0V.
    f). single stage CE.
    g) emitter degeneration, with no capacitor bypass.


    a), Since load = 10K and your gain is specified as a NO load gain of 20,
    for starters make your RC around 10K, to match the load.

    b). now use this equation (Av = RC / RE) .....therefor (RE = RC / Av.) .....RE=??

    c). Now 0v. sits at the collector. (all voltages respect to ground)
    which means is then 1/2 the total supply voltage will be dropped across RC to attain
    this. So use this equation (VCC / RC = IC) ........IC=??

    d). Now solve for the Voltage DROP across RE.... (VRE = IC x RE).........VRE=??

    e). Here is where it gets a little tricky, if your not careful.
    VB ={ VEE + (VRE + Vbe)}, this is solved like this, VEE with respect to ground = -5v.
    So this partial loop works as follows, (VEE + VRE + Vbe) =VB
    which is (-5v. + VRE +Vbe) = VB, You should get a neg. value at this point.

    f). Once you get that value, then to continue the loop, you need to algebraicly solve for the
    voltage DROP NEEDED across R1 (VR1) that will equal a positive value of VCC.
    So when you algebraicly add VCC into this loop you will end back at the begining which
    is 0v.
    Looks like this, (starting from ground) VEE + VB + VR1 + VCC = 0v.
    {-5v. + VB + VR1 -5v.} = 0v.
    VR1 =??

    g). Now make R2> Rin.

    h). Now solve for the voltage DROP ACROSS R2......(VR2)
    Use this equation, (VRE + Vbe) = VR2
    solve for current thrugh this resistor use this equation, IR2 = (VR2 / R2)= .......IR2=??

    I). Solve for R1 use this equation, R1 = (VR1 / IR2) ......R1=??

    I simulated it,and had to adjust R1 a little higher than calculated to get close to VC @ 0v.
    Remember the voltages are refrenced to ground, where ground is considered the connectrion between both battery supplies.

    Have fun.
    Last edited: Mar 13, 2010
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  5. alphacat

    Thread Starter Active Member

    Jun 6, 2009
    Thank you so much Hobbyist and K7elp60!!

    I learned so much from the way you started off.

    I'd like to ask you 2 questions please regarding how you handled it.

    You started off by choosing a collector resistor.
    Hobbyist, you said its value should match the load resistor, which is reasonable (so at least we will get half of the output voltage transferred to the load).
    What made you start off by picking first RC, and say not picking first IC or any other parameter?

    You concluded that
    Av = RC / RE.

    However, the exact formula is:
    Av = gm / (1 + gm * RE) * RC

    Meaning, you assumed that:
    gm * RE >> 1

    However, according to K7elp60's calculations:
    gm * RE = 4mS * 500Ω = 2 ~ 1

    But according to Hobbyist's calculations:
    gm * RE = 20mS * 500Ω = 10 >> 1

    So I assume that you always need to check that indeed
    gm * RE >> 1,
    isnt it?

    I wanted to ask one more thing please.

    Hobbyist, in the equation you wrote for VB:
    VB = VEE + VRE + VBE

    Should we assume that
    VBE ≈ 0.6V ?
    Last edited: Mar 13, 2010
  6. Jony130

    AAC Fanatic!

    Feb 17, 2009
    Calculations may look like this:

    But if Rload=10K then Rc<0.1*Rload




    R2 = (Vb-Vee) / (10*Ib)

    R1= (Vcc- Vb) / (11*Ib)

    So if we assume β=100; Ib=10uA


    But if R1=8.1K we don't get Rin >10K
    So we need to find bjt with β larger then 200 e.g. BC548B. (of-course we can change Ic by increase Rc)
    Or increase R2 and R1 to:
    R2 = (Vb-Vee) / (5*Ib) = 16KΩ

    R1= (Vcc- Vb) / (6*Ib)
    = 150KΩ
    Last edited: Mar 13, 2010
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  7. hobbyist

    AAC Fanatic!

    Aug 10, 2008

    In answering your questions,

    I should have pointed out, that I was using
    first order approximations.

    That usually gets you into the ballpark with values close enough to readjust as nesecary.

    Your methods are going into a more refined order of calculations, which I leave that up to you, because you have more of an understanding of it then I do. I could learn from you on that order.

    The reason I chose RC, was just to get a start on the design, knowing a value for the load (10K), gave me something to work with, and knowing a value for Av. was an easy way to proceed with the design.

    A design can start with any parameters you choose.

    I chose R2 to be around 10 x RE to keep the base current from loading the divider, again that is a first order approximation.

    A more refined way would be to add in the parrallel resistances plus the (B+1*RE+re) factor ect...

    I hope I was able to give you a starting point, which it looks like you now have a good handle on it, so now you can use the more refined equations to work with this design.

    Have fun...

    Study joni130's post
    He sums it up real nice an neatly, with nice short easy to follow equations.

    Thankyou for taking the time to reply back, to let us know that you got our posts...
    alphacat likes this.
  8. alphacat

    Thread Starter Active Member

    Jun 6, 2009
    I really thank you guys.

    I managed to design it with your help.
    according to the simulation:
    Av,int = 18.8
    Rin = 56KΩ
    Rout =19.89KΩ

    In order to get Rin, I kept the VCC and VEE working, and calculated v_in / i_in, its correct right?
    And to get Rout, I kept VCC and VEE working, neutralized Vin, connected a voltage source instead of load (from coupling capacitor at output to ground) and calculated v_out/i_out, is it right?

    Last edited: Mar 13, 2010
  9. Jony130

    AAC Fanatic!

    Feb 17, 2009
    Yes, its correct.
    And you use very low Ic current and this could cause problems in real circuit.
    alphacat likes this.
  10. alphacat

    Thread Starter Active Member

    Jun 6, 2009
    Hi Jony.
    Thank you again.

    Why could low IC cause problems?
  11. hobbyist

    AAC Fanatic!

    Aug 10, 2008
    I just quickly seen your schem.

    Your VEE is the neg. 5v. but the schematic, shows the neg. term. on both supplies as grounded.

    I don't know if your simulation picks up on that, or goes by the absolute value written (-5v.) but the total supply should be 10 volts.

    with the 2 batteries in series, and the ground in between.

    Hope this makes sense.

    If your simulator goes by the actual pic.

    then neg. term of VEE needs to be connected to the emitter.
  12. alphacat

    Thread Starter Active Member

    Jun 6, 2009
    Hi Hobbyist.

    Spice recognizes negative voltages.
    So VEE is indeed -5V and not 5V as you might think.

    I designed a voltage buffer as well (I will actually build this dual-stage amplifier this week).
    I noticed that you can't use a coupling capacitor between the two stages.
    Its like I needed to set ahead the CE's output to 0VDC and the CC's input to 0VDC, in order to be able to connect them to each other.

    Am I missing something?
    Like, what happens if the CE is designed to have an output of 2.5VDC,
    while the CC is designed to be biased by 0VDC?

  13. hobbyist

    AAC Fanatic!

    Aug 10, 2008

    Using dual supplies is pretty new to me too.
    So I am kind of stumbling through this myself.

    First may I suggest that you put both batteries in series, with the neg. term on one connected to the pos term. on the other, and then write for the voltage "5v." on each, that way it would be much easier to analyze the circuit. And then place the ground in the connection of both of these batteries.

    I'm not quite understanding why such high value resistors in the base network.

    I'll design a class A stage using your first requirements, using my simulator, and see if I can make things more clearer.

    I got to say your doing a good job, at working at this, and trying to get a good handle on it.

    I'll be back later, with a schem...
  14. PRS

    Well-Known Member

    Aug 24, 2008
    Yes, assume .6 volts for transistor base to emitter drops. Hobbyist did very well with his explanation.
  15. hobbyist

    AAC Fanatic!

    Aug 10, 2008

    Here is 2 schematics.

    This is just to get VC close to ground potential.
    Didn't do any simulation with it, to check for linear amplification, and gain and such.

    First shows the VC using calculations, and nominal resistor values only.

    The second is the VC after adjusting R1.

    I had to make R2 greater than 10 x RE so as to meet the Rin requirements. So I chose 12K ohms.

    However (B+1) x RE is included when going further in calculations.

    All calculations wer done on a first order (approximation) Only.

    dual sup.jpg

    By making R1 higher seemed to cause the VC to be closer to design value, HOWEVER,
    that may not have been the better thing to do, because if it goes to high then the base current will begin loading and controling the network, thereby causing fluctuations, at the output when its parameters change.

    That's why in designing a circuit, it is best to prototype it, and check all parameters, (measurements and all testings), for the desired results.
    Last edited: Mar 13, 2010
    alphacat likes this.
  16. PRS

    Well-Known Member

    Aug 24, 2008
    Here's my approach.

    *The parameter Av=20 no load gives you the freedom to pick whatever Rc you want. RL becomes irrelavent. But Av=20 no load means Rc must be 20 times greater than Re, for Av=Rc/Re

    * Rin >= 10k means your R1 and R2 resistors in parallel must be greater than 10k to the extent that when you put them in parallel with Rin=B*Re you satisfy the requirement.

    * Making the voltage at the collector = 0 is a matter of math. Vc = Vcc -IcRc = 0

    * Incidently, there are no requirements on frequency response so high resistances are usable.

    Taking all of this into consideration, I'd go with hobbyist's thought and make Rc=10K to maximize the power to the load.

    Given that, Re must be <= 10k/20= 500 ohms. But use the standard value Re=470 ohms.

    Now the question of the current, Ic. It must be selected such as to give 0 volts at the collector. So this must satisfy Vc=Vcc-IcRc=0. We know Vcc and Rc so Ic must be 0.5 mA. Therefore the voltage at the emitter must be Ve=IeRe= .5mA. Therefore Ve=.5*470=.235 volts. Which makes Vb=.835 volts. (note the appoximation Ic=Ie is due to 10% resistor values and variable Beta of the xistor. To get exactly 0 volts you need a variable resistor in the bias circuit, probably R2.)

    Here comes another approximation. The junction of R1 and R2 are taken as simple voltage division, ignoring the small current into the base of the xistor. And this, again, is due to the 10% approximation rule. We are not using exact equations here, but first order equations and non-ideal resistors.

    So Vb=.835 volts. Excuse me if I simplify the dual power supply by supposing a single supply of 10 volts. It makes life easier.

    [eq 1] [R2/(R1+R2)]*Vcc=Vb This is one equation for determining R1 and R2. The other is this. To make the amplifier work for any value of current gain (Beta) you use the rule of thumb: Idivider= Ic/10. So we will have .5mA/10=.05 mA.

    Therefore [eq 2] Vcc*2/(R1+R2)=.05mA. (Vcc*2 is just both supplies taken together).

    Solving eq 2 we get R1+R2=200k

    And puting this into eq 1 we get R2=16.7k and then from eq2 we get R1=183k

    So use R1=180k and R2=15k, uh oh. Do we have Rin>=10k? Let's find out: Rin' is the resistance looking into the xistor. Assuming a Beta of 100, this reflects Re=470 into the base as Beta*470=47000. Thus we have"

    Rin=1/47000 + 1/180000 + 1/15000 = 10,695 ohms and we passed!

    But to get exactly 0 volts at the collector use a pot for R2.
    Last edited: Mar 13, 2010
    alphacat likes this.
  17. Jony130

    AAC Fanatic!

    Feb 17, 2009
    All this problems with finale adjustment of a R1, R2 is caused by Ve voltage is smeller then Vbe.
    If we "proper" design the amplifier with Ve large then Vbe and Idivider= Ic/10 rule. Then the influence of a BJT parameters decrease significantly.

    For example for Ve=1V; and Ve=2V and Hfe chance from 95 to 450.

    So for Ve=1V ; Ic change from 509uA to 563uA (change only by 10.6%).
    ------ Ve=2V ; Ic change from 505uA to 545uA (change by 8%)
    And for Ve=0.22mV; Ic change from 240uA to 428uA (change by 78%).

    So if we design the simple amplifier its always good to choose Ve large then Vbe. And large Ve improves thermal stability to.
    And to set the gain we need to add a extra Re2 resistor plus capacitor Ce.

    But if you wont better discrete amplifier ( DC-coupling) why don't you use long tailed pair as a input stage.


    This type of amplifiers is very easy to design and they have much better parameters then simple BJT amplifiers.
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    Last edited: Mar 14, 2010
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  18. PRS

    Well-Known Member

    Aug 24, 2008
    Very well said, Joni, and you made good points. But doesn't this go well beyond the simplicity of the original circuit? ;)
    alphacat likes this.
  19. PRS

    Well-Known Member

    Aug 24, 2008
    Here's a circuit based on the design considerations and my calculations above. I changed R2 from 15 k to 18 k (standard values), and got nearly 0 volts at the collector. The waveform is fine as you can see in the simulation attached. Hope this helped. By the way, to get 0 volts at the collector dead on, you need a variable resistor in place of R1 or R2 or in series with one of them.
  20. Audioguru


    Dec 20, 2007
    Why does Jony's simulator show the negative battery connected backwards?