Designing a NAND gate with 8 inputs

Discussion in 'Homework Help' started by mcc123pa, Oct 12, 2010.

  1. mcc123pa

    Thread Starter Member

    Sep 12, 2010
    Hi everyone-

    I am working on this problem for homework:

    a) Design the 8-input NAND gate using 2-input NAND gates and NOT gates.

    b) Design the 8-input NAND gate using 2-input NAND gates, 2-input NOR gates ,and NOT gates only if needed.

    c) Compare the number of gates used in (a) and (b).

    My attempt at a solution:

    part a) I simply drew a NAND gate with four inputs and then connected a two input NAND gate to each of the four inputs. As far as variables go, I just assigned letters A-H as my imputs. Is this correct?

    part b) I am not really sure what to do here. Pointers please?

    part c) Obviously I need to complete part A and B before I can do this.

    Thanks in advance for your help everyone!
  2. jpanhalt


    Jan 18, 2008
    Are you confused about what the questions are asking or about the electronics/logic involved?

    I ask that, because I don't see why you chose to use a 4-input NAND gate for the first question. The question seems to be specific about only using 2-input NAND gates.

  3. Georacer


    Nov 25, 2009
    Are you familiar with Boolean logic and working with its epxressions? You basically have to rework the expressions to get the operations that are available.

    I 'll give you an expample on how to do it, by constructing a 4-input NAND with method a). Let the inputs be A1 to A4. I have available expressions of \bar {A \cdot B} and \bar{A}.

    I start from the outcome I want:
    F=\bar{A1A2A3A4}\\<br />
=\bar{(A1A2)(A3A4)}\\<br />
=\bar{\bar{\bar{(A1A2)}} \cdot \bar{\bar{(A3A4)}}

    Now try it yourself!