Hi all-
Here are the directions to my problem:
Design a 2-to-4 decoder with Enable input. Use only NAND and NOT gates. The circuit should operate with complemented Enable input and with complemented output. That is, the decoder is enabled when E is equal to 0 (when E is equal to 1, the decoder is disabled regardless of the values of the other two inputs; when disabled, all output are HIGH). The selected output is equal to 0(while all other outputs are equal to 1)
That's a lot, but I managed to find a website that breaks it down with a good complete drawing and truth table: http://teahlab.com/Combinational/decoders/twoFourDecoder/two4decodere.html
In my opinion, the drawings here match what I was asked to do in this problem. My question is, is this problem the same as the one I was given? Do I need to alter the drawing/table given on the website to fit my problem?
Thanks in advance for any help you can give!!
Here are the directions to my problem:
Design a 2-to-4 decoder with Enable input. Use only NAND and NOT gates. The circuit should operate with complemented Enable input and with complemented output. That is, the decoder is enabled when E is equal to 0 (when E is equal to 1, the decoder is disabled regardless of the values of the other two inputs; when disabled, all output are HIGH). The selected output is equal to 0(while all other outputs are equal to 1)
That's a lot, but I managed to find a website that breaks it down with a good complete drawing and truth table: http://teahlab.com/Combinational/decoders/twoFourDecoder/two4decodere.html
In my opinion, the drawings here match what I was asked to do in this problem. My question is, is this problem the same as the one I was given? Do I need to alter the drawing/table given on the website to fit my problem?
Thanks in advance for any help you can give!!