The following is a link to the prompt for our Electronics 2 design lab. My question is in building the circuit itself. From what I've gathered, I'll use +5V off the power supply to power the LM393. From there, we must also use that +5V as our reference voltage. For the second stage of the 393, we must use a 12 volt signal, and that signal will be varying. Basically I'm not sure what I'm looking for as far as the design goes, and don't fully understand how to incorporate the different states given in the specifications (i.e. TRAP going low or high).


http://www.cs.ucf.edu/courses/eel4309-kasp/DesignProject.pdf

 

A differential comparator like LM393 compares voltages. These must however lie within the common-mode voltage range for the device, so bearing in mind the warning about input voltages given in the text, do not be tempted to apply the 5V directly to an input when you are powering the LM393 from this same supply.

You will need to use both parts of the dual comparator, with inputs suitably scaled by potential division to get the right sensitivities, while keeping the input voltages within acceptable limits.

The choice of outputs going low or high with increasing input is simply a matter of choosing which input to apply the input to, inverting or non-inverting (the reference voltage goes on the opposite input).

The difference between the two threshold levels for each input is set by applying a suitable small dose of positive feedback from the output to the non-inverting input of each comparator.

 

It is well and good that you have taken steps to detect the decrease in DC voltage input to your regulator as early as possible. In most designs, you will find that the decay in power supply is very unpredicatible and often quite rapid. It is rare that the power supply will be able to hold up its output for more that a few milliseconds once it begins to collapse.

In general there are two strategies taken in concert that can buy you the precious tens of milliseconds that you will need to shutdown your processor gracefully. One is to provide some source of short term energy storage usually provided in the form of a very large capacitor. This capacitor is kept fully charged to its maximum energy during normal operation and only comes into play when the input power supply is interrupted. Another important strategy is to shed all unnecessary loads as soon as possible upon detection of power loss.

Careful design of the energy storage together with load shedding can result in a gain of many additional milliseconds for use in successfully shutting down your microprocessor in a clean state.

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