# Design of a 4 bit bouncing counter using JK flip flops with start/ reset inputs

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#### Stas0001

Joined Nov 16, 2022
15
Hi,
As project for university i've been asked to design a 4 bit synchronous bouncing counter with start/reset input.
The counter is able to perform the following sequence when the start input is '1' or high: 15,2,3,4,5,6,7,6,5,4,3,2 and then repeat its cycle again.
If start input is low or '0' the counter's output should be its present state.
However, when a reset input is '1' or high, the counter should reset and start counting again from binary number 15.
Anyone able to explain me how to implement this circuit using the start/reset input?

#### dl324

Joined Mar 30, 2015
15,511
Welcome to AAC!
The counter is able to perform the following sequence when the start input is '1' or high: 15,2,3,4,5,6,7,6,5,4,3,2 and then repeat its cycle again.
The count sequence looks like a typo to me. Could you post the entire text of the problem and double check the count sequence?

#### Stas0001

Joined Nov 16, 2022
15
"When electrical power is applied, your counter circuit should start in an initial state which outputs a binary ‘15’ value. Your counter should remain in its initial state, outputting a ‘15’, until a Start signal is asserted. When the Start goes high, the next output of your circuit should be a binary '2' (start value). If Start remains high, each subsequent falling clock edge should cause your device to increment its output by 1, until it reaches a value equal to ‘start value + 5’. After that, assuming Start remains high, the output will be reduced by 1 with each subsequent falling clock edge, until it reaches a value equal to ‘start value’, and starts counting up again. If Start goes low, the machine should remain in its present state until Start goes high again. Your circuit should also include a synchronous Reset input which, when asserted, will cause the device to go to the ‘15’ value on the next falling clock edge. If the Start signal is high at the next falling clock edge, your device will start counting again from the beginning. Otherwise, the machine will wait in the initial state (‘15’) until the Start signal is asserted."

#### Stas0001

Joined Nov 16, 2022
15
Hi, yes the count sequence it's definitely correct: 15,2,3,4,5,6,7,6,5,4,3,2,...

#### dl324

Joined Mar 30, 2015
15,511
Hi, yes the count sequence it's definitely correct: 15,2,3,4,5,6,7,6,5,4,3,2,...
Try again. That's not what I get from the text.
EDIT: My mistake. Show you work so far.

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#### Stas0001

Joined Nov 16, 2022
15
Sorry, the text says when that when the electrical power is applied the counter should output a binary number '15' and then when the start input is high the counter should start count from binary number '2' is that right?
How do i bring my counter to output '15' when the start input is low?

#### Stas0001

Joined Nov 16, 2022
15
Hi sorry, haven't started yet because i'm still confused how to start from binary '15' and how do i treat the start/reset input? Would i need to consider each combination of inputs for each state? Like 00,01,10?
Thank again for the patience

#### ericgibbs

Joined Jan 29, 2010
17,180
How do i bring my counter to output '15' when the start input is low?
Hi,
Will your counter have an initial Reset ?
E

#### Stas0001

Joined Nov 16, 2022
15
Hi,
Now that i think about it, yes it starts in a reset condition.
Would you mind looking at my previous question please?

#### ericgibbs

Joined Jan 29, 2010
17,180
hi S,
As this is a College assignment, we limit help to guidance only.
Consider how many Bits are required for a count of Decimal 15.?

How many clocked stages do you think are required.?
E

#### Stas0001

Joined Nov 16, 2022
15
1111 is the count of decimal 15 and 14 are the clocked stages required. Is that right?
What do i do with the reset input?

#### ericgibbs

Joined Jan 29, 2010
17,180
hi S.
I suggest you post a basic block diagram of the proposed counter, so that we have a common reference to discuss.

E

#### Stas0001

Joined Nov 16, 2022
15

#### ericgibbs

Joined Jan 29, 2010
17,180
hi,
The first step would be to create a sequential Truth Table for all the possible combinations of the Output Bit States that meet the decoded 15,2,3,4,5,6,7,6,5,4,3,2 requirement
Can you do that.?
E

#### Stas0001

Joined Nov 16, 2022
15
Hi yes i can do that, but do i need to insert the two inputs start/reset in the truth table all its possible combination? or just the present states?
Thank you

#### ericgibbs

Joined Jan 29, 2010
17,180
Hi @Stas0001
Look over this PDF, does the device suggest any ideas on the Up/Down Count 15,2,3,4,5,6,7,6,5,4,3,2 requirement?

External Logic Gates will be needed to give the required Binary/Decimal values.

Post your best shot at a circuit diagram.

E

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#### Stas0001

Joined Nov 16, 2022
15
Are you suggesting using a preset and clear input?
I thought about it but unfortunately the circuit has to be simulated on Simulink which doesn't have any option for flip flops to have preset and clear inputs.
Any suggestions?

#### ericgibbs

Joined Jan 29, 2010
17,180
hi,
I am not familiar with Simulink, I use the LTspice simulator.

Have you started the Truth Table.?

E

#### Stas0001

Joined Nov 16, 2022
15
hi,
Do i need to insert the inputs combination in the truth table?

#### ericgibbs

Joined Jan 29, 2010
17,180
hi,
You will need all the Table, so that you can design the hardware logic.
E

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