This is for a homework. If anyone can guide me a bit it'd be much appreciated.

 

hi jumpy,
Welcome to AAC.
As this homework we need to see your attempt at answering, we can then help.
E

 

Welcome to AAC!

For a random sequence, you cannot do it with a straight counting counter such as 74193 unless you use some kind of look-up table.

The way this exercise is usually accomplished is by designing a finite-state machine using flip-flops (typically J-K flip-flops) and lots of decoding circuitry.

 

Hello,

The 7495 is a 4 bit parallel shift register (see page 69 of the attached databook)
The 74193 is a 4 bit synchonuos 4 bit counter (see page 162 of the attached databook)

To make the wanted sequence will be quite a task with those parts.

Bertus

 

hi jumpy,
Welcome to AAC.
As this homework we need to see your attempt at answering, we can then help.
E

Unfortunately I don't really know how to attempt solving it by using these IC's. I don't need the solution directly, but rather an idea of how I'd go about using them to solve the problem.

One thing that i forgot to mention is that I am allowed to also use 7400-series circuits.

 

Unfortunately I don't really know how to attempt solving it by using these IC's. I don't need the solution directly, but rather an idea of how I'd go about using them to solve the problem.

One thing that i forgot to mention is that I am allowed to also use 7400-series circuits.

Perhaps if you posted the complete text for the problem, we'd have a better idea of how to guide you.

But, if you're at a complete loss for how to get started, you should probably talk with your instructor.

 

Were you told that you must use 74193 and 7495 ICs or was this your assumption?
That does not appear to be a viable solution.

 

@MrChips gave a clue in the first paragraph of his post.

Of required ICs, which ones can be used in MrChips suggestion of a lookup table? First, how would you specify each count output of each element in a lookup table using that IC?

Second, how would you select (address) each element? Note: additional basic 7400 series gates are required.

Thirdly, how would you only output one count? Again you will need additional gates.

Think about this with a count sequence of just two outputs. Once you have an idea, then the remaining counts are easy.

I only have an idea in mind. And I haven’t drawn it out. So maybe it works or maybe it won’t. You need to find that out as pert if your assignment.

 

You only have those two parts for solution ? Something is missing
in assignment pre conditions.

https://www.allaboutcircuits.com/te...ted-with-fpgas-look-up-tables-and-flip-flops/

https://www.engr.siu.edu/haibo/ece428/notes/ece428_seq.pdf


Your stated count sequence is 8 states, and 3 bits will represent the
values.

A simple registered LUT will do the entire solution easily -




You have to fill in the state machine bit pattern, simple to do.

Regards, Dana.

 

A simple registered LUT will do the entire solution easily

The solution didn't allow a look up table, per se.

One thing that i forgot to mention is that I am allowed to also use 7400-series circuits.

He's supposed to decode the output of a binary counter. Technically, I supposed that could include using a 74188 PROM. But, somehow, I don't think that's what the instructor had in mind.

 

You could connect the Q outputs of the counter to a 1 of N decoder like a 74LS138. Use each 1 of N output to drive the appropriate input of an 8 to 3 priority encoder like the 74LS148 e.g. a '0' counter shows up as the '0' output of the decoder and that drives the '2' input of the encoder which outputs a '2'. The '1' output of the counter/decoder drives the '0' input of the encoder and so on. The output of the 'counter' is the '148 outputs.

You also could dispense with the counter altogether and drive the '138 from D flip flops. The '148 is wired to provide the next state when the f/fs are clocked. Kind of like Dana's rig above.

Back in the TTL daze such arrangements were commonly used to implement state machines, micro-sequencers and the like.

But if you think you should be doing Kmaps and the like, google
analysis of clocked sequential networks
and you'll get lots of good stuff like the attached.pdf

Have fun!
74LS148
74LS138