Delay Circuit

Thread Starter

robby991

Joined Dec 17, 2007
79
Hello, I would like to implement a simple circuit which when receives a signal, waits a certain amount of time before it sends out a pulse. How can I construct a simple delay circuit like this?

How about: Input pulse --> resistor --> Capacitor --> Comparator--> output pulse once charging of Cap reaches input pulse

would this work?


Thank you.
 

KMoffett

Joined Dec 19, 2007
2,918
robby991,

The devil's in the details.

What's the input signal: voltage, polarity, and timing?
What power source is available: 1.5VDC, ,5VDC, 9VDC, 12VDC, 120 VAC, 220VAC?
What's the delay time?
What's the output signal: voltage, polarity, load, pulse width?

Should be easy.

Ken
 

Thread Starter

robby991

Joined Dec 17, 2007
79
Sorry KMoffett, I always forget these details when posting on these forums. Once receiving a positive voltage (3-5 V), I would like to wait about 1 ms before outputting the same voltage level. The pulse width is not important, anything will do. I have a DC power supply, so I can use anything between 1-20V.

Veritas, I will look into the 555. Thanks for you help!
 
Does your circuit have to trigger on the rising or falling edge of you input pulse? Perhaps a decade or 14 stage counter would help. You can hold the reset line high until your input pulse is active then just pick your output pin.
 

KMoffett

Joined Dec 19, 2007
2,918
robby991,

I think the hook here is "outputting the same voltage level". If I have this right: if the input signal is +3V than you want a +3V output pulse to start 1mS later, and if the input signal is +4.2V than you want a +4.2V output pulse to start 1mS later. 555's and logic chips will always output a fixed (mostly) voltage level.

I don't have a solution, so will be looking forward, with you, to others' ideas.

What's this used for?

Ken

An idea: Monostable (555 or logic) triggered by leading edge of input (as suggested) driving P-channel mosfet as a transmission gate. Input has to be there during the whole monostable cycle.
 

Thread Starter

robby991

Joined Dec 17, 2007
79
Project Robot:

I don't think it matters, so we can just say on the rising edge of the input pulse. This should work fine.
 

Thread Starter

robby991

Joined Dec 17, 2007
79
Ken: I don't understand what you are saying, I am new to 555. In monostable mode, the circuit produces a single pulse when triggered. How can I add a delay before this pulse is generated? I know you can vary the period of the output pulse, but I don't know how to delay this pulse.
 

KMoffett

Joined Dec 19, 2007
2,918
You're right to be confused. :( "Two monostables" (two 555s or one 556). The first is triggered by your input signal. This provides the delay. The falling edge of the first monostable triggers the second one. This determines your output pulse width. What are you doing with the output pulse?

Ken
 

veritas

Joined Feb 7, 2008
167
You can do it with a single 555 if you don't care about your output pulse width; just connect the output of the 555 to the instantaneous pulse circuit I provided. If you need a high pulse instead of a low pulse, pass it through an inverter.

The pulse width for the instantaneous pulse circuit is approximately R*C
 

Thread Starter

robby991

Joined Dec 17, 2007
79
Ken. The output pulse is going to the the control line to a tri-state buffer. Once the pulse is generated, it closes the switch, allowing "A" to pass to "B".

Veritas. That is exactly what I need.
 

veritas

Joined Feb 7, 2008
167
Glad I could help. I actually just used a very similar circuit in my senior design project, so the idea was fresh in my mind.
 

veritas

Joined Feb 7, 2008
167
It is based on the idea that a capacitor cannot instantaneously charge or discharge, so immediately after the input changes, the output will always be:

Vout = Vin + Vcap

Since output is tied to Vcc through a resistor, it will always return to Vcc as the capacitor charges or discharges through that resistor.

When the input is low, the capacitor is charged to Vcc (Vcap = Vcc). When the input goes high (asssume Vcc), the output's instantaneous voltage tries to go to Vin + Vcap = 2 * Vcc, but the extra charge flows through the diode, so there is only a minor bump in the output.

Since Vin is now equal to Vcc, the capacitor has no charge (Vcap = 0), so when the output goes back low, the output will follow the input (Vo = Vin + 0) until the capacitor charges again.

I hope that makes sense.
 

KMoffett

Joined Dec 19, 2007
2,918
Robby991,

So, here's a shot at a circuit that will work according to what I think you want:

Analog input are pulses with varying widths (?) and amplitudes (3-5V)

The delay between the start of the analog input and the start of the analog output is 1.0mSec. (adjust to exact with R4)

The width of the analog output is fixed (by R7,R8,C5).

The supply voltage for the 555's should be the same as your tri-state gate's logic.

Problem?: If the analog input pulse is shorter than [1.0mS + the output pulse width] (see the forth input pulse), the width of analog output will be 1mS shorter than the input pulse width. :eek:

Ken
 

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Thread Starter

robby991

Joined Dec 17, 2007
79
Thanks ken and Veritas for your schematics. I have been reading up on 555 timers now to get familiar with them. Regarding your setup veritas, will this generate just one delayed pulse, or a pulse train? Meaning, when you trigger a 555 in astable mode with a single pulse, does that produce one output pulse, or does that act as a sort of "on" signal which turns on the 555 to continuously generate pulses?
 
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