Default Why ADC/1024 is correct, and ADC/1023 is just plain wrong! correction

Discussion in 'Programmer's Corner' started by hary, Apr 28, 2014.

  1. hary

    Thread Starter New Member

    Oct 11, 2013
    Hello everyone.

    Quite new to programming but I think I've detected an error in this interesting thread.

    Isn't it (((ADC*2)+1) *500 +1024 )/2048
    instead of ((ADC*2)+1) *500 +1024 /2048
  2. ErnieM

    AAC Fanatic!

    Apr 24, 2011
    That looks better.

    I do suggest you pick the exact part you are intending to use and carefully read it's data sheet. Not some application note from a different manufacturer, not Wikipedia, not some other sheet, but the sheet for the exact device you intend to use.

    Somewhat surprisingly, if you do the math you will find the conversion divisor to be a multiple of 1023, 1023.5, or 1024.

    Should you wish to discuss this point further, look out. You have angered the ogre and expect several comments. I've had all I have to say on this topic, but do feel free to PM me on this topic (and just this topic).
    Last edited: Apr 28, 2014
  3. THE_RB

    AAC Fanatic!

    Feb 11, 2008
    Thanks for the suggestion Hary.

    No angry ogres here, it's a good suggestion to make the order of precedence operators bulletproof and I have edited the formula in the thread to this;
    ((((ADC*2)+1) *500) +1024) /2048
    to remove any chance of ambiguity. I have credited you with the suggestion.

    ErnieM made a good point about using the exact datasheet for the device you are using, just keep in mind that with Microchip datasheets I found a couple of errors in their ADC charts for different PICs. Some fixed in later datasheet revisions.

    The other version of this thread which was stickied on the ETO forum;
    has more discussion so it might be worth checking out too.

    The important thing to remember with successive approximation ADCs is that they use a comparator and an internal DAC of Xbits (a binary number of bits). The DAC is set to 1/2 Vref, then the comparator tells if the voltage is either side of that point. Then the DAC set to 1/4 Vref (or 3/4 Vref), and tested for either side of that point. It should be obvious that there will be a total even number, binary divisible number of segments.

    The nature of R2R DAC dividers as used in ADCs means that it would be very hard to make the top and bottom segments different sizes to the rest of the segments. So you can be pretty certain the binary number of segments (1024) used in the voltage comparsions are all the same size.

    Some of the best documents for this are the data acquisition white papers, i think I linked one from Texas Instruments in that thread.