De-multiplexing of address and data lines

Thread Starter


Joined Feb 28, 2012
hi!! i want to understand the de-multiplexing process that separates the lower ordered AD0-AD7 into address and data lines


Joined Nov 25, 2009
The uC has 8 address bits output and one latch control, say E. An external 8-bit latch is mounted onto the address bus.

At first the latch control is LOW, and the lower 8 address bits are driven onto the address bus. A moment later, E goes HIGH and the latch "locks" its data permanently. Then, the uC can use the address bus to either display the 8 higher address bits, or use the bus to display data.

Is that clear?