DC Analysis of FET-based circuit

Reply to Thread

Discussion in 'Homework Help' started by Digit0001, Oct 29, 2011.

Reply to Thread
  1. Oct 29, 2011 #1
    Digit0001

    Thread Starter Member

    Mar 28, 2010
    89
    0
    Hi
    the following question i don't understand why they have used the saturation mode equation to find Id. Because when i checked that Vsd > Vsd(sat)
    so it should be in non-saturation mode.

    where Vsd = 0.15 and Vsd = 4.2 so Vsd < Vsd(sat)
    where Vsd(sat) =Vsg + Vtp = 5-0.8 = 4.2V

    tut6_qes9.JPG

    P.S
     
    #1 Reply
Loading...
Related Forum Posts:
  1. triggerflick45

    DC circuit analysis requirements

    Posted by triggerflick45 in forum: Career Advising
    Replies:
    9
    Views:
    510
  2. venkataphaniendrak

    DC loading analysis of Digital circuit

    Posted by venkataphaniendrak in forum: Digital Circuit Design
    Replies:
    5
    Views:
    266
  3. omar-rodriguez

    DC Analysis of MOSFET

    Posted by omar-rodriguez in forum: Homework Help
    Replies:
    14
    Views:
    1,236
  4. moke007

    DC Circuit analysis

    Posted by moke007 in forum: Homework Help
    Replies:
    9
    Views:
    868
  5. max_power

    DC Circuit Analysis

    Posted by max_power in forum: Homework Help
    Replies:
    5
    Views:
    1,466
You May Also Like:

  1. Dr. Neal Koblitz: Independent Co-creator of Elliptic Curve Cryptography

  2. New I/O Expander from Diodes Incorporated Offers Low-Voltage Compatibility

  3. Troubleshooting Tools for Your Next Bluetooth LE Project: Ubertooth and the Nordic nRF Sniffer


Load More Articles