current limiting oscillation

Thread Starter

bug13

Joined Feb 13, 2012
2,002
Hi guys,

I am working on this power supply current limiting circuit, so when I_SENSE > I_SET, it should pull the voltage down to limit the current, but the problem is, when it is operation in current limit mode, the output oscillate, which is no good.

So how do I fix that?

 

Thread Starter

bug13

Joined Feb 13, 2012
2,002
edit: I have tried adding a cap between I_SET and the output before the 10K resistor in series with the base of the transistor.

It helps in some way but still oscillate, just in lower frequency (about 30Hz).
 

GopherT

Joined Nov 23, 2012
8,009
Three things,


Read the datasheets on your LM358, they should be connected to the positive rail with a pull-up resistor (open collector design). With that, you may want to change to a PNP pass transistor in your bottom circuit (and swap the inputs) so the pull-up keeps the transistor off when high and current passes when pulled low. In other words, comparitors are not op amps with push-pull outputs. This is a single transistor output switch device.

Second, any capacitors on your input "Sense" will delay the ability of the comparitor to respond. Try removing that capacitor on your bottom op-amp.

Finally, comparitors do not have the high-input resistance of an Op Amp - they can't be everything so you get the high speed but pay for it with lower input resistance. That being said, you may be getting oscillation from the input resistance changing as the output goes from high to low, or, low to high (especially when the SENSE voltage is close in voltage to the SET input) and causes the sensed voltage of your input to be at different voltages. Use a follower buffer to insure small current leakages into the comparitor don't change cause your voltage to change.
 

Ron H

Joined Apr 14, 2005
7,063
Three things,


Read the datasheets on your LM358, they should be connected to the positive rail with a pull-up resistor (open collector design). With that, you may want to change to a PNP pass transistor in your bottom circuit (and swap the inputs) so the pull-up keeps the transistor off when high and current passes when pulled low. In other words, comparitors are not op amps with push-pull outputs. This is a single transistor output switch device.

Second, any capacitors on your input "Sense" will delay the ability of the comparitor to respond. Try removing that capacitor on your bottom op-amp.

Finally, comparitors do not have the high-input resistance of an Op Amp - they can't be everything so you get the high speed but pay for it with lower input resistance. That being said, you may be getting oscillation from the input resistance changing as the output goes from high to low, or, low to high (especially when the SENSE voltage is close in voltage to the SET input) and causes the sensed voltage of your input to be at different voltages. Use a follower buffer to insure small current leakages into the comparitor don't change cause your voltage to change.
LM358 is an op amp, not a comparator.

As mentioned, any delay (RC time constant) in the loop will tend to cause oscillation unless compensated for elsewhere by a lead network. In addition to the cap mentioned by GopherT, you have that 10uF from V_set to GND, which will cause more lag in response time.
 
Last edited:

thatoneguy

Joined Feb 19, 2009
6,359
In addition to the cap mentioned by GopherT, you have that 10uF from V_set to GND, which will cause more lag in response time.
That is the part that caught my eye, why was it added to the circuit? Was it supposed to be on the regulator input or output?
 

Ron H

Joined Apr 14, 2005
7,063
My intention is to stabilize the VSET, should I omit it, or should I use a lot smaller value cap?
You need to have no caps in the current sense loop. It will probably still oscillate.:(
What does the current sense circuit look like?
 

tubeguy

Joined Nov 3, 2012
1,157
Hi guys,

I am working on this power supply current limiting circuit, so when I_SENSE > I_SET, it should pull the voltage down to limit the current, but the problem is, when it is operation in current limit mode, the output oscillate, which is no good.
Yes, its oscillating because when the comparator is tripped, the current drops, the comparator resets and the loop repeats.
It might be better to switch the bottom comparator to an amplifier configuration such that the output to the transistor is around 0.6-0.7 volts at the desired setpoint so the transistor begins to turn on gradually when the set point is reached.
 

Thread Starter

bug13

Joined Feb 13, 2012
2,002
Yes, its oscillating because when the comparator is tripped, the current drops, the comparator resets and the loop repeats.
It might be better to switch the bottom comparator to an amplifier configuration such that the output to the transistor is around 0.6-0.7 volts at the desired setpoint so the transistor begins to turn on gradually when the set point is reached.
Hi tubeguy,

I don't quite get it, can you show me the circuit please?
 

thatoneguy

Joined Feb 19, 2009
6,359
Yes, its oscillating because when the comparator is tripped, the current drops, the comparator resets and the loop repeats.
It might be better to switch the bottom comparator to an amplifier configuration such that the output to the transistor is around 0.6-0.7 volts at the desired setpoint so the transistor begins to turn on gradually when the set point is reached.
What about changing the lower op amp from open gain to some feedback, so that the Vset is adjusted linearly rather than on/off?
 

Ron H

Joined Apr 14, 2005
7,063
What about changing the lower op amp from open gain to some feedback, so that the Vset is adjusted linearly rather than on/off?
And don't forget to get rid of those two capacitors.
Actually, one big time constant in the current sense loop could stabilize it, but two will almost definitely make it oscillate.
 

Thread Starter

bug13

Joined Feb 13, 2012
2,002
OK, get rid of those two caps doesn't work, it get worse, it oscillate like crazy.

but if I only remove the 0.1uF cap and keep the 10uF cap, the oscillation is kept to a acceptable level. The final output is kept around 50mV Vpp in constant current mode, and the normal constant voltage mode is under 10mV Vpp.

Thanks guys!!

EDIT:

so what's the other way to achieve this function (current limiting) in a power supply?
 
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