counter: 0011, 0110, 1100, 1001, 0011,...

Discussion in 'Homework Help' started by rafaltrus, Nov 16, 2011.

  1. rafaltrus

    Thread Starter New Member

    Nov 16, 2011
    Hey, guys. This is my first post on the forum so I apologize if I don't include something that "should" be provided in a question.

    To the point: Using a standard counter-4 and as few logic gates as possible, I am supposed to build a counter that counts the sequence: 3,6,12,8,... etc.

    I have figured out that I need a NAND gate with Q0Q1'Q2'Q3 connected to the Load. When load is 1, load D0-D3 = 1100. UP will be always 1, and the CLK connected to the clock. I realize this is what shift registers do and this is in fact another part of the homework question - to implement the above sequence using a 4-bit left-shift register, but I know how to do this one.

    My question is about the counter: I don't really see the logic that should be applied...
    It looks like D0 = Q2, D1 = Q3', D2 = Q0' and D3 = Q1' but I don't know what to do with it.


    Last edited: Nov 16, 2011
  2. MrChips


    Oct 2, 2009
    Use Karnaugh mapping.
  3. rafaltrus

    Thread Starter New Member

    Nov 16, 2011
    I may be just tired by now... How would I use the mapping?
  4. Georacer


    Nov 25, 2009
    It is important for us that you post the entire desired count sequence. The logic is the following:

    You want to map the count sequence 3-6-12-8... to the original counter sequence 1-2-3-4...

    That means that you want to build a logic function circuit that will be attached to your circuit and will implement the mapping.
  5. RiJoRI

    Well-Known Member

    Aug 15, 2007
    It looks like the OP needs a shift register with the fourth bit getting fed back into the first bit. I'm guessing that the first clock should do a LOAD.

    (Funny, my first response was "Grab a small microcontroller!" I used to have fun working out this kind of stuff!)

  6. samin


    Oct 14, 2011
    First, you should describe a general sequential circuit in terms of its basic parts and its input and outputs.

    *Then develop a state diagram for the given sequence ( 3,6,12,8 ), this will help you then to develop a next-state table for the specific counter sequence.

    *Create a FF transition table.

    *Use Karnaugh map to derive the logic equations.

    *Implement a counter to produce a specified sequence of states.
  7. Georacer


    Nov 25, 2009
    Ok, the shift register is very elegant, but it requires initialization, which needs an extra one-two circuit, like a D-FF.

    Besides, the OP asked for a counter circuit, which is still very simple. Just rig the counter to reset at 3 and implement the appropriate logic function.

    On a side note, any four consequent numbers will do, as long as you preset the counter correctly. It may even result to an easier function.