Convert Spice Netlist to Schematic view!

Thread Starter

annette

Joined Feb 11, 2008
2
Hi Everyone,

I am a student of State Univercity of Moscow. I am writing Diploma work .
I find these forum of Cadence company while searching the name of my Diploma in Google.
I am not a member of Cadence Company .
I have to create Converter , which will convert ONLY digital standard cells' netlist view into schematic file.
The input file is schematic netlist --- > for example some netlist of NAND schema,with 3 inputs:

I II III IV V
mp1 sp1 A1 VDD VDD
mp2 sp1 A2 VDD VDD
mp3 Z sp1 VDD VDD
mn2 sn2 A2 VSS VSS
mn1 sp1 A1 sn2 VSS
mn3 Z sp1 VSS VSS

I : the names of NMOS and PMOS transistors, II: Drain connection , III: Gate connection, IV:Source , V: Bulk

From such discription of schematic the program which I am going to create will generate transistor level schematic view (hierarchic or flat (my choose)).As the work will be done only for standard digital circuits , I think the view will be flat, as there is no hierarchi for example in drawing Multiplexer.

I consider , the Cadence Tools are not open source , so I won't be able to get access to them .
I also try to get access to Spice Vision Pro program, it seems it does such converting.

Could you help , give any advise , how to start work of writing such program!

Thanks in advance,
Ani
 

scubasteve_911

Joined Dec 27, 2007
1,203
No need to double post, maybe 'bump' the original thread.

I think that you may have better luck with a forum that specializes in the particular language you wish to use to make your program. I say this because your specific task does not require much electrical knowledge, it involves high level programming. I cannot imagine an automated way of laying down the devices and having them connect intelligently.

Best of luck!,

Steve
 

John Luciani

Joined Apr 3, 2007
477
A netlist contains only connection data. A schematic contains data for symbols,
symbol placement and connection. It could be difficult to get a human readable
schematic from just the connection data. You may be able to generate a schematic
that you could manual correct.

Check out the gEDA project for open source schematic software. I have created
a variety of scripts that automate EDA tasks. Checkout http://www.luciani.org/geda/geda-index.html

(* jcl *)
 

SgtWookie

Joined Jul 17, 2007
22,210
Cadsoft's Eagle Layout Editor v4.16 has a ULP (User Language Program) provision for making all of the connections in a Netlist, but it requires that you first place the library components into the schematic capture program from a Parts List with reference designators matching those in the Netlist.

Sample Part list from Cadsoft Eagle:
Rich (BB code):
Exported from TripleFlashLEDBeaconV3.sch at  2/14/2008 10:24:49a

EAGLE Version 4.16r2 Copyright (c) 1988-2006 CadSoft

Part     Value          Device            Package  Library        Sheet

C1       2.2uF          CPOL-USE15-5AXIAL E15-5    rcl            1
IC1      4017N          4017N             DIL16    40xx           1
IC2      4075N          4075N             DIL14    40xx           1
IC3      4093N          4093N             DIL14    40xx           1
J1                      MTA06-100         10X06MTA con-amp        1
Q1       IRF510         IRF510            TO220    transistor-fet 1
Q2       IRF510         IRF510            TO220    transistor-fet 1
R1       10K            R-US_0207/10      0207/10  rcl            1
R2       100K           PC16S             PC16S    piher          1
R3       10K            R-US_0207/10      0207/10  rcl            1
R4       10K            R-US_0207/10      0207/10  rcl            1
Sample Netlist:
Rich (BB code):
Netlist

Exported from TripleFlashLEDBeaconV3.sch at  2/14/2008 10:24:26a

EAGLE Version 4.16r2 Copyright (c) 1988-2006 CadSoft

Net      Part     Pad      Pin        Sheet

N$1      C1       +        +          1
         IC3      1        I0         1
         IC3      2        I1         1
         R2       1A       1A         1

N$3      R1       1        1          1
         R2       1S       1S         1

N$4      IC1      14       CLK        1
         IC3      3        O          1
         R1       2        2          1

N$5      IC1      3        Q0         1
         IC2      1        I0         1

N$6      IC1      4        Q2         1
         IC2      2        I1         1

N$7      IC1      10       Q4         1
         IC2      8        I2         1

N$8      IC1      11       Q9         1
         IC2      5        I2         1

N$9      IC1      6        Q7         1
         IC2      4        I1         1

N$10     IC1      1        Q5         1
         IC2      3        I0         1

N$11     IC2      9        O          1
         R3       1        1          1

N$12     IC2      6        O          1
         R4       1        1          1

N$13     Q1       1        G          1
         R3       2        2          1

N$14     Q2       1        G          1
         R4       2        2          1

N$15     J1       6        6          1
         Q2       2        D          1

N$16     J1       5        5          1
         Q1       2        D          1

VDD      IC1      16       VDD        * none *
         IC2      14       VDD        * none *
         IC3      14       VDD        * none *
         J1       1        1          1

VSS      C1       -        -          1
         IC1      13       ENA        1
         IC1      15       RES        1
         IC1      8        VSS        * none *
         IC2      11       I0         1
         IC2      12       I1         1
         IC2      13       I2         1
         IC2      7        VSS        * none *
         IC3      12       I0         1
         IC3      13       I1         1
         IC3      5        I0         1
         IC3      6        I1         1
         IC3      7        VSS        * none *
         IC3      8        I0         1
         IC3      9        I1         1
         J1       3        3          1
         Q1       3        S          1
         Q2       3        S          1
The original schematic is attached.

You must have a way of associating your reference designators with components in your libraries.
The usual way to do this would be using a parts list, or Bill of Materials List.

Cadsoft's website:
http://www.cadsoft.de/
You can download a demonstration version that is functional, but limited to 2 layers, 1 schematic sheet, and small board size.
The ULP for converting a netlist to a schematic is:
cmd-net-list2sch.ulp
 

Attachments

nicky

Joined Mar 25, 2008
3
Annette,
there is a tool called spicevision from www.concept.de that can create schematics from spice netlists. They also have a verilog based netlist reader.
I am evaluating their SGVisionPro at work. The tool can read spice and verilog at the same time and creates a really great hierarchical schematic that is easy to navigate. Have a look. It might do what you need.
It's a commercial tool, but at least it lets you know that what you want is possible.

Nicky
 
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