Discussion in 'Homework Help' started by screen1988, Mar 17, 2013.

1. ### screen1988 Thread Starter Member

Mar 7, 2013
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4
The attached file is response of MOS differential pair to input CM variation. In this case, we assume that the circuit is a perfect symmetry.
Then $I_{D1}=I_{D2}=\dfrac {I_{ss}} {2}$, and hence $V_{GS1}=V_{GS2}= const$. If $V_{CM}$ varies, the voltage across current source will vary accordingly.
Now, I want to ask about how current source can change it voltage like this?
Can I consider it as a resistor that have constant current throught it?
What is the actual internal circuit of current source?

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2. ### #12 Expert

Nov 30, 2010
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These are 2 of my favorite constant current circuits. The second one is adjustable.

The theoretical "ideal" constant current circuit has a constant current through it and an infinite resistance, which seems impossible. The "ideal" constant voltage source has a constant voltage with zero resistance in series. I think the Thevenin theory applies to this.

• ###### Constant Current Circuits.png
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3. ### WBahn Moderator

Mar 31, 2012
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Consider the corresponding question for a voltage source hooked up to a variable resistor. As you change the resistance, the current through the source changes accordingly. How can it change current like that?

The answer is that the voltage source produces whatever currrent is required in order to hold the voltage across it fixed. The reverse is true for a current source and it will produce whatever voltage across it is necessary in order to maintain the same current through it.

In general, no.

That varies a lot. There are some natural phenomena that act like poor current sources. Most, however, are constructed circuits and they can be as simple as a biased transistor [strikeout diode] (usually biased by means of a current mirror) or extremely complex circuits. Generally, the more simple the lower the output impedance. Recall than you want a very, very high (ideally infinite) output impedance for a current source because the output impedance appears in parallel with the ideal current source.

Last edited: Mar 18, 2013
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4. ### screen1988 Thread Starter Member

Mar 7, 2013
310
4
Thanks, in your first figure, the transistor has G is connected to D and therefore it will operate in saturation model. But in your second figure, G is not connected directly to D and how can I know that the transistor will operate in saturation?
Can you explain it to me?

5. ### screen1988 Thread Starter Member

Mar 7, 2013
310
4
Thank you!
I understand it now but I am curious how the voltage source or current source really do it. Could you show me a simple example to show what you have just said?

6. ### WBahn Moderator

Mar 31, 2012
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The attached circuit is a current source, albeit a pretty bad one.

The base current is (Vcc-Vbe)/Ib and the load current is nominally β times this. There are two big problems: first, the β of the transistor is not very well known (and it changes with various factors such as junction temperature) and also the collector current is not just β*Ib, but rather it increases with increasing Vce. So as you reduce the resistance of the load, the current will go up. The amount it goes up by is a reflection of the effective output impedance of the current source not being infinite.

If we use a voltage divider to bias the base and add an emitter resistor, then as long as the current in the voltage divider is significantly more than the base current we have a way to hold the base voltage pretty constant. This means that the voltage across the emitter resistor will be pretty constant and, hence, the collector current. This configuration actually creates a pretty decent current souce and is used in many circuits. It's not perfect, it's not even great, but it is often good enough.

If you need better and better current sources, then you add additional complexities to the circuit, usually in the form of improved feedback mechanisms.

• ###### CCS.png
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7. ### #12 Expert

Nov 30, 2010
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I do not believe that either circuit is in "saturation" mode.

In the lowest voltage ranges, like 1 or 2 volts, a jfet does not act like a constant current source. In that range of voltages, the current is dependent on the voltage applied. Only when you get a few volts applied does the jfet stabilize at a constant current. From the first drawing, we see that the gate and source are tied together and thus have zero volts across them. Only the voltage from drain to source are allowed to change, therefore, only the voltage from drain to source changes. As you apply more voltage to the circuit, the jfet stabilizes as a constant current device by having more voltage from drain to source.

In the second drawing, the gate is connected after the current flows through a resistor. The voltage across the resistor creates a situation where the voltage at the source is more positive than the voltage at the bottom of the resistor, and therefore, the gate. Having the gate less positive that the source lowers the current through the jfet. Now, the jfet is a constant current device with less than the maximum possible current the jfet was designed for. Again, the jfet does not stabilize as a constant current device until you have more than 1 or 2 volts from the drain to the source. When you apply more than 1 or 2 volts to the circuit, the excess voltage is found to be on the drain side of the circuit.

"Saturation" is defined as a condition where the voltage from collector to emitter or drain to source is minimum. Therefore, I do not believe that either of the circuits I posted are in saturation.

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