Computer architecture problems

Discussion in 'Homework Help' started by nhaldipuri, May 11, 2014.

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  1. nhaldipuri

    Thread Starter New Member

    Apr 6, 2014
    Please help.

    1. A program accesses each element of a 1024X1024 matrix 8 times in each course of its execution. If the data cache can accommodate 256 matrix elements and 16 matrix elements per block/page, then how many compulsory data cache misses will be caused by this program's execution ?

    Ans: Now , I have assumed the following things:-
    i) The Main memory size is 1024X1024Xsizeof(int).
    ii) The number of blocks in cache is= 256/16=16.
    iii) The access is row-wise means
    [1023][0]……….[1023][1023] are accesed sequentially one after another.
    iv) 8 acceses are also sequential:- means first all the elements are accessed one time then again accessed,again,…until the number of access is 8.
    v) Also I have considered that the scheme for mapping is “Direct Mapping.
    Now ,there are 256/16=16 cache line.Each contain 16 array elements.[numbered 0,1 ,2 ,3,4 ,… ,15].
    There are (1024X1024)/16 =65536 main memory blocks.[ block number is 0,1,2,,3,4,……..65535.]
    First time [0][0] element will not be there in cache.The whole line of MM numbered 0 will be fethed in cache 0 line. There will be no miss for next 15 elements as they are already in cache.
    In 16 elements there are 1 cache miss. There are 16 misses in accesing 256 array elements. There are 1024X1024 elements accessed at a time. There are (1024X1024/256)=4096 cache misses.
    The number of misses in 1 whole access of 1024X1024 elements is 4096.
    For 8 whole access ccache miss=8X4096=32768.
    Now Is my answer correct? Please help if there is anything wrong. I will be satisfied if one can give a better solution with a different approach.
  2. MrChips


    Oct 2, 2009
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