Well, here it is...It works well, and draws 8.3mA (quiescient current) The first stage provides a 1 sec pulse to wake the camera, and start the delay trigger (shuts off Q1) Then there is around a half-second delay before the trigger on U2 gets down to 1/3 vcc and starts the second pulse to trigger the shutter. In the meantime, the JK returns to low (not Q is high) and recharges the RC circuit. There are likely some improvements that can be made, but for now, I'm at my limit of my knowledge. The pulses had to overlap in order to utilize the JK flip-flop and prevent an illegal low on the trigger at U2 after it resets. One of my first lessons here doing this project.
Any suggestions would be welcome.
Any suggestions would be welcome.
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