cmos transistor


Joined Aug 21, 2008
In the structure of most if not all CMOS inverters, there is a parasitic SCR that can be triggered if the VDD or VSS is exceeded and sufficient current is drawn. When that happens, the effect is like shorting VDD to VSS and things get hot in a hurry.


Joined Mar 14, 2008
The parasitic SCR is triggered by substrate current, either from excess Vdd causing breakdown current, or excess positive or negative input voltage causing large currents through the input protection diodes.

The SCR can also be triggered by substrate photo currents generated by high ionizing radiation levels (but that normally requires a nuclear explosion in the vicinity). ;)