# CMOS logic levels to a NIM logic level line driver?

#### Pinkamena

Joined Apr 20, 2012
22
Hi everyone!

The ADCMP600 is a fast comparator with TTL/CMOS compatible outputs (high = Vcc-0.4V, low = 0.4V). The output of this comparator needs to be conveyed over several meters (~3) of coax cable to a 50-ohm terminated NIM crate input. However, the NIM standard sets logic "0" at 0mA, and logic "1" at -16mA.

The million dollar question is: What is the best way of converting the voltage-mode TTL logic to the current-mode NIM logic? And how can I best ensure that the signal is transferred with its fast leading edge intact? The NIM crate in question is a fast timetagger, and so propagation delay jitter in the logic level converter/line driver/coax cable is of importance and must be less than 1ns. The total propagation delay does not matter, only jitter does.

I look forward to your suggestions!

#### crutschow

Joined Mar 14, 2008
30,114
That's not an easy shift (strange the NIM uses a negative logic level whereas almost all logic outputs are positive).
Here's a thread that may help where Bill Sloman offers some insight.

#### crutschow

Joined Mar 14, 2008
30,114
Here is the LTspice simulation of a simple circuit that would seem do what you want.
The source Vcomp simulates the comparator output of 0V to 4.3V with a 5V supply.
The output current of the comparator is boosted by emitter-follower Q2, which drives the grounded-base level-shifter Q1, generating 0ma to -16mA nominal through the 50Ω load, RLoad.

The simulated output levels were -16.1mA and +0.3mA. These current levels can be adjusted by changing the values of R2 and/or R3 if your supply or logic level voltages are different from the simulated values.

The propagation delay is less than 1ns so the jitter should certainly be much less then that.

Note that the logic is inverted from input to output with a logic low input giving a logic high (-16mA) output.

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#### Pinkamena

Joined Apr 20, 2012
22
That's an elegant and simple solution! Thank you.

#### crutschow

Joined Mar 14, 2008
30,114
Note that for good waveform fidelity at those transition times (which correspond to a frequency of a hundred MHz or so), layout is critical. A sloppy layout with long leads on a standard perf board will not work well.
The circuit should be built on a circuit board (vector board type is okay) with a ground plane, using as short leads as possible.
The collector Q2 and bottom of resistor R3 should have a 0.1μF ceramic decoupling capacitor (preferably surface mount type) directly to the ground plane.
The output should be connected directly to the coax connector with the connector common directly to the ground plane.
The comparator must be close to this circuit, also on a ground plane (preferably on the same board as the circuit), with the supply pins decoupled in the same manner.